Enum stm32_hal2::dma::DmaInput [−][src]
#[repr(usize)]
pub enum DmaInput {
Show 41 variants
Adc1,
Dac1Ch1,
Dac1Ch2,
Tim6Up,
Tim7Up,
Spi1Rx,
Spi1Tx,
Spi2Rx,
Spi2Tx,
Spi3Rx,
Spi3Tx,
I2c1Rx,
I2c1Tx,
I2c2Rx,
I2c2Tx,
I2c3Rx,
I2c3Tx,
I2c4Rx,
I2c4Tx,
Usart1Rx,
Usart1Tx,
Usart2Rx,
Usart2Tx,
Usart3Rx,
Usart3Tx,
Uart4Rx,
Uart4Tx,
Uart5Rx,
Uart5Tx,
Lpuart1Rx,
Lpuart1Tx,
Adc2,
Adc3,
Adc4,
Adc5,
Sai1A,
Sai1B,
Sai2A,
Sai2B,
Dfsdm1F0,
Dfsdm1F1,
}
Expand description
A list of DMA input sources. The integer values represent their DMAMUX register value, on MCUs that use this. G4 RM, Table 91: DMAMUX: Assignment of multiplexer inputs to resources.
Variants
Adc1
Dac1Ch1
Dac1Ch2
Tim6Up
Tim7Up
Spi1Rx
Spi1Tx
Spi2Rx
Spi2Tx
Spi3Rx
Spi3Tx
I2c1Rx
I2c1Tx
I2c2Rx
I2c2Tx
I2c3Rx
I2c3Tx
I2c4Rx
I2c4Tx
Usart1Rx
Usart1Tx
Usart2Rx
Usart2Tx
Usart3Rx
Usart3Tx
Uart4Rx
Uart4Tx
Uart5Rx
Uart5Tx
Lpuart1Rx
Lpuart1Tx
Adc2
Adc3
Adc4
Adc5
Sai1A
Sai1B
Sai2A
Sai2B
Dfsdm1F0
Dfsdm1F1
Implementations
Select the hard set channel associated with a given input source. See L44 RM, Table 41.
Find the value to set in the DMA_CSELR register, for L4. Ie, channel select value for a given DMA input. See L44 RM, Table 41.