Struct stm32_hal2::pac::can1::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub mcr: Reg<MCR_SPEC>,
    pub msr: Reg<MSR_SPEC>,
    pub tsr: Reg<TSR_SPEC>,
    pub rfr: [Reg<RFR_SPEC>; 2],
    pub ier: Reg<IER_SPEC>,
    pub esr: Reg<ESR_SPEC>,
    pub btr: Reg<BTR_SPEC>,
    pub tx: [TX; 3],
    pub rx: [RX; 2],
    pub fb: [FB; 28],
    // some fields omitted
}

Register block

Fields

mcr: Reg<MCR_SPEC>

0x00 - master control register

msr: Reg<MSR_SPEC>

0x04 - master status register

tsr: Reg<TSR_SPEC>

0x08 - transmit status register

rfr: [Reg<RFR_SPEC>; 2]

0x0c..0x14 - receive FIFO %s register

ier: Reg<IER_SPEC>

0x14 - interrupt enable register

esr: Reg<ESR_SPEC>

0x18 - interrupt enable register

btr: Reg<BTR_SPEC>

0x1c - bit timing register

tx: [TX; 3]

0x180..0x1b0 - CAN Transmit cluster

rx: [RX; 2]

0x1b0..0x1d0 - CAN Receive cluster

fb: [FB; 28]

0x240..0x320 - CAN Filter Bank cluster