Struct stm32_hal2::spi::Spi [−][src]
pub struct Spi<R> {
pub regs: R,
pub cfg: SpiConfig,
}
Expand description
Represents a Serial Peripheral Interface (SPI) peripheral.
Fields
regs: R
cfg: SpiConfig
Implementations
Initialize an SPI peripheral, including configuration register writes, and enabling and resetting its RCC peripheral clock.
L44 RM, section 40.4.9: “Procedure for disabling the SPI” When SPI is disabled, it is mandatory to follow the disable procedures described in this paragraph. It is important to do this before the system enters a low-power mode when the peripheral clock is stopped. Ongoing transactions can be corrupted in this case. In some modes the disable procedure is the only way to stop continuous communication running.
Read a single byte if available, or block until it’s available. See L44 RM, section 40.4.9: Data transmission and reception procedures.
Write a single byte if available, or block until it’s available. See L44 RM, section 40.4.9: Data transmission and reception procedures.
Write multiple bytes on the SPI line, blocking until complete. See L44 RM, section 40.4.9: Data transmission and reception procedures.
Read multiple bytes to a buffer, blocking until complete. See L44 RM, section 40.4.9: Data transmission and reception procedures.
pub unsafe fn write_dma<D>(
&mut self,
buf: &[u8],
channel: DmaChannel,
dma: &mut Dma<D>
) where
D: Deref<Target = RegisterBlock>,
pub unsafe fn write_dma<D>(
&mut self,
buf: &[u8],
channel: DmaChannel,
dma: &mut Dma<D>
) where
D: Deref<Target = RegisterBlock>,
Transmit data using DMA. See L44 RM, section 40.4.9: Communication using DMA.
Note that the channel
argument has no effect on F3 and L4.
pub unsafe fn read_dma<D>(
&mut self,
buf: &mut [u8],
channel: DmaChannel,
dma: &mut Dma<D>
) where
D: Deref<Target = RegisterBlock>,
pub unsafe fn read_dma<D>(
&mut self,
buf: &mut [u8],
channel: DmaChannel,
dma: &mut Dma<D>
) where
D: Deref<Target = RegisterBlock>,
Receive data using DMA. See L44 RM, section 40.4.9: Communication using DMA.
Note taht the channel
argument has no effect on F3 and L4.
pub fn stop_dma<D>(&mut self, channel: DmaChannel, dma: &mut Dma<D>) where
D: Deref<Target = RegisterBlock>,
pub fn stop_dma<D>(&mut self, channel: DmaChannel, dma: &mut Dma<D>) where
D: Deref<Target = RegisterBlock>,
Stop a DMA transfer. Stops the channel, and disables the txdmaen
and rxdmaen
bits.
Run this after each transfer completes - you may wish to do this in an interrupt
(eg DMA transfer complete) instead of blocking.
Enable an interrupt. Note that unlike on other peripherals, there’s no explicit way to clear these. RM: “Writing to the transmit data register always clears the TXE bit. The TXE flag is set by hardware.”
Trait Implementations
impl<R> FullDuplex<u8> for Spi<R> where
R: Deref<Target = RegisterBlock> + DmaPeriph + RccPeriph,
impl<R> FullDuplex<u8> for Spi<R> where
R: Deref<Target = RegisterBlock> + DmaPeriph + RccPeriph,
Auto Trait Implementations
impl<R> RefUnwindSafe for Spi<R> where
R: RefUnwindSafe,
impl<R> UnwindSafe for Spi<R> where
R: UnwindSafe,
Blanket Implementations
Mutably borrows from an owned value. Read more
type Error = <S as FullDuplex<W>>::Error
type Error = <S as FullDuplex<W>>::Error
Error type
pub fn transfer(
&mut self,
words: &'w mut [W]
) -> Result<&'w [W], <S as FullDuplex<W>>::Error>
pub fn transfer(
&mut self,
words: &'w mut [W]
) -> Result<&'w [W], <S as FullDuplex<W>>::Error>
Sends words
to the slave. Returns the words
received from the slave