Struct stm32_hal2::clocks::PllCfg

pub struct PllCfg {
    pub enabled: bool,
    pub pllr_en: bool,
    pub pllq_en: bool,
    pub pllp_en: bool,
    pub divm: Pllm,
    pub divn: u8,
    pub divr: Pllr,
    pub divq: Pllr,
    pub divp: Pllr,
}

Configures the speeds, and enable status of an individual PLL (PLL1, or SAIPLL). Note that the enable field has no effect for PLL1.

Fields

enabled: bool

Only relevant for PLLSAI1.

pllr_en: bool

pllq_en: bool

pllp_en: bool

divm: Pllm

Only relevant for The main PLL.

divn: u8

divr: Pllr

divq: Pllr

divp: Pllr

Implementations

impl PllCfg

pub fn disabled() -> Self

Trait Implementations

impl Default for PllCfg

fn default() -> Self

Returns the “default value” for a type.