Struct stm32_hal2::dac::Dac [−][src]
pub struct Dac<R> {
pub regs: R,
// some fields omitted
}
Expand description
Represents a Digital to Analog Converter (DAC) peripheral.
Fields
regs: R
Implementations
Initialize a DAC peripheral, including enabling and resetting
its RCC peripheral clock. vref
is in volts.
Calibrate the DAC output buffer by performing a “User trimming” operation. It is useful when the VDDA/VREF+ voltage or temperature differ from the factory trimming conditions.
The calibration is only valid when the DAC channel is operating with the buffer enabled. If applied in other modes it has no effect.
After the calibration operation, the DAC channel is disabled.
Enable the DAC, for a specific channel.
Disable the DAC, for a specific channel.
Set the DAC output word.
pub unsafe fn write_dma<D>(
&mut self,
buf: &[u16],
dac_channel: DacChannel,
dma_channel: DmaChannel,
channel_cfg: ChannelCfg,
dma: &mut Dma<D>
) where
D: Deref<Target = RegisterBlock>,
pub unsafe fn write_dma<D>(
&mut self,
buf: &[u16],
dac_channel: DacChannel,
dma_channel: DmaChannel,
channel_cfg: ChannelCfg,
dma: &mut Dma<D>
) where
D: Deref<Target = RegisterBlock>,
Send values to the DAC using DMA. Each trigger (Eg using a timer; the basic timers Tim6 and Tim7 are designed for DAC triggering) sends one word from the buffer to the DAC’s output.
Set the DAC output voltage.
Select and activate a trigger. See f303 Reference manual, section 16.5.4. Each time a DAC interface detects a rising edge on the selected trigger source (refer to the table below), the last data stored into the DAC_DHRx register are transferred into the DAC_DORx register. The DAC_DORx register is updated three dac_pclk cycles after the trigger occurs.
Independent trigger with single LFSR generation See f303 Reference Manual section 16.5.2
Independent trigger with single triangle generation See f303 Reference Manual section 16.5.2
Enable the DMA Underrun interrupt - the only interrupt available.
Clear the DMA Underrun interrupt - the only interrupt available.