Enum stm32_hal2::adc::SampleTime

#[repr(u8)]pub enum SampleTime {
    T1,
    T2,
    T4,
    T7,
    T19,
    T61,
    T181,
    T601,
}

ADC sampling time

Each channel can be sampled with a different sample time. There is always an overhead of 13 ADC clock cycles. E.g. For Sampletime T_19 the total conversion time (in ADC clock cycles) is 13 + 19 = 32 ADC Clock Cycles [derive(Clone, Copy)]

Variants

T1

1.5 ADC clock cycles

T2

2.5 ADC clock cycles

T4

4.5 ADC clock cycles

T7

7.5 ADC clock cycles

T19

19.5 ADC clock cycles

T61

61.5 ADC clock cycles

T181

181.5 ADC clock cycles

T601

601.5 ADC clock cycles

Trait Implementations

impl Default for SampleTime

fn default() -> Self

T_1 is also the reset value.