RmiiTxD0

Trait RmiiTxD0 

Source
pub unsafe trait RmiiTxD0 { }
Expand description

RMII TX Data Pin 0

§Safety

Only pins specified as ETH_RMII_TXD0 in a part’s Reference Manual may implement this trait.

Implementations on Foreign Types§

Source§

impl RmiiTxD0 for PB12<Input>

Source§

impl RmiiTxD0 for PG13<Input>

Implementors§