Struct stm32_eth::stm32::rtc::RegisterBlock

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pub struct RegisterBlock {
Show 18 fields
    pub tr: Reg<TR_SPEC>,
    pub dr: Reg<DR_SPEC>,
    pub cr: Reg<CR_SPEC>,
    pub isr: Reg<ISR_SPEC>,
    pub prer: Reg<PRER_SPEC>,
    pub wutr: Reg<WUTR_SPEC>,
    pub calibr: Reg<CALIBR_SPEC>,
    pub alrmr: [Reg<ALRMR_SPEC>; 2],
    pub wpr: Reg<WPR_SPEC>,
    pub ssr: Reg<SSR_SPEC>,
    pub shiftr: Reg<SHIFTR_SPEC>,
    pub tstr: Reg<TSTR_SPEC>,
    pub tsdr: Reg<TSDR_SPEC>,
    pub tsssr: Reg<TSSSR_SPEC>,
    pub calr: Reg<CALR_SPEC>,
    pub tafcr: Reg<TAFCR_SPEC>,
    pub alrmssr: [Reg<ALRMSSR_SPEC>; 2],
    pub bkpr: [Reg<BKPR_SPEC>; 20],
    /* private fields */

}
Expand description

Register block

Fields§

§tr: Reg<TR_SPEC>

0x00 - time register

§dr: Reg<DR_SPEC>

0x04 - date register

§cr: Reg<CR_SPEC>

0x08 - control register

§isr: Reg<ISR_SPEC>

0x0c - initialization and status register

§prer: Reg<PRER_SPEC>

0x10 - prescaler register

§wutr: Reg<WUTR_SPEC>

0x14 - wakeup timer register

§calibr: Reg<CALIBR_SPEC>

0x18 - calibration register

§alrmr: [Reg<ALRMR_SPEC>; 2]

0x1c..0x24 - Alarm register

§wpr: Reg<WPR_SPEC>

0x24 - write protection register

§ssr: Reg<SSR_SPEC>

0x28 - sub second register

§shiftr: Reg<SHIFTR_SPEC>

0x2c - shift control register

§tstr: Reg<TSTR_SPEC>

0x30 - time stamp time register

§tsdr: Reg<TSDR_SPEC>

0x34 - time stamp date register

§tsssr: Reg<TSSSR_SPEC>

0x38 - timestamp sub second register

§calr: Reg<CALR_SPEC>

0x3c - calibration register

§tafcr: Reg<TAFCR_SPEC>

0x40 - tamper and alternate function configuration register

§alrmssr: [Reg<ALRMSSR_SPEC>; 2]

0x44..0x4c - Alarm sub-second register

§bkpr: [Reg<BKPR_SPEC>; 20]

0x50..0xa0 - backup register

Implementations§

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impl RegisterBlock

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pub fn alrmar(&self) -> &Reg<ALRMR_SPEC>

0x1c - Alarm register

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pub fn alrmbr(&self) -> &Reg<ALRMR_SPEC>

0x20 - Alarm register

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pub fn alrmassr(&self) -> &Reg<ALRMSSR_SPEC>

0x44 - Alarm sub-second register

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pub fn alrmbssr(&self) -> &Reg<ALRMSSR_SPEC>

0x48 - Alarm sub-second register

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