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ControlFlowInstructions

sp1_jit::instructions

Trait ControlFlowInstructions 

Source 
pub trait ControlFlowInstructions: Sized {
    // Required methods
    fn beq(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64);
    fn bne(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64);
    fn blt(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64);
    fn bge(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64);
    fn bltu(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64);
    fn bgeu(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64);
    fn jal(&mut self, rd: RiscRegister, imm: u64);
    fn jalr(&mut self, rd: RiscRegister, rs1: RiscRegister, imm: u64);
}

Required Methods§

Source

fn beq(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64)

Compare the values of two registers, and jump to an address if they are equal.

beq: pc = pc + ((rs1 == rs2) ? imm : 4)

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn bne(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64)

Compare the values of two registers, and jump to an address if they are not equal.

bne: pc = pc + ((rs1 != rs2) ? imm : 4)

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn blt(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64)

Compare the values of two registers, and jump to an address if the first is less than the second.

blt: pc = pc + ((rs1 < rs2) ? imm : 4)

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn bge(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64)

Compare the values of two registers, and jump to an address if the first is greater than or equal to the second.

bge: pc = pc + ((rs1 >= rs2) ? imm : 4)

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn bltu(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64)

Compare the values of two registers, and jump to an address if the first is less than the second, unsigned.

bltu: pc = pc + ((rs1 < rs2) ? imm : 4)

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn bgeu(&mut self, rs1: RiscRegister, rs2: RiscRegister, imm: u64)

Compare the values of two registers, and jump to an address if the first is greater than or equal to the second, unsigned.

bgeu: pc = pc + ((rs1 >= rs2) ? imm : 4)

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn jal(&mut self, rd: RiscRegister, imm: u64)

Jump to an address.

jal: rd = pc + 4, pc = pc + imm

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Source

fn jalr(&mut self, rd: RiscRegister, rs1: RiscRegister, imm: u64)

Jump to an address, and return to the previous address.

jalr: rd = pc + 4, pc = rs1 + imm

NOTE: During transpilatiom, this method will emit the PC bumps for you, typically however, you will want to explicty call [SP1RiscvTranspiler::set_pc] at the end of each instruction.

Dyn Compatibility§

This trait is not dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.

Implementors§