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Opcode

sp1_core_executor

Enum Opcode

#[repr(u8)]pub enum Opcode {
Show 53 variants    ADD = 0,
    ADDI = 1,
    SUB = 2,
    XOR = 3,
    OR = 4,
    AND = 5,
    SLL = 6,
    SRL = 7,
    SRA = 8,
    SLT = 9,
    SLTU = 10,
    MUL = 11,
    MULH = 12,
    MULHU = 13,
    MULHSU = 14,
    DIV = 15,
    DIVU = 16,
    REM = 17,
    REMU = 18,
    LB = 19,
    LH = 20,
    LW = 21,
    LBU = 22,
    LHU = 23,
    SB = 24,
    SH = 25,
    SW = 26,
    BEQ = 27,
    BNE = 28,
    BLT = 29,
    BGE = 30,
    BLTU = 31,
    BGEU = 32,
    JAL = 33,
    JALR = 34,
    AUIPC = 35,
    LUI = 36,
    ECALL = 37,
    EBREAK = 38,
    ADDW = 39,
    SUBW = 40,
    SLLW = 41,
    SRLW = 42,
    SRAW = 43,
    LWU = 44,
    LD = 45,
    SD = 46,
    MULW = 47,
    DIVW = 48,
    DIVUW = 49,
    REMW = 50,
    REMUW = 51,
    UNIMP = 52,
}

Expand description

An opcode (short for “operation code”) specifies the operation to be performed by the processor.

In the context of the RISC-V ISA, an opcode specifies which operation (i.e., addition, subtraction, multiplication, etc.) to perform on up to three operands such as registers, immediates, or memory addresses.

While the SP1 zkVM targets the RISC-V ISA, it uses a custom instruction encoding that uses a different set of opcodes. The main difference is that the SP1 zkVM encodes register operations and immediate operations as the same opcode. For example, the RISC-V opcodes ADD and ADDI both become ADD inside the SP1 zkVM. We utilize flags inside the instruction itself to distinguish between the two.

Refer to the “RV32I Reference Card” here for more details.

Variants§

ADD = 0

rd ← rs1 + rs2, pc ← pc + 4

ADDI = 1

rd ← rs1 + imm, pc ← pc + 4

SUB = 2

rd ← rs1 - rs2, pc ← pc + 4

XOR = 3

rd ← rs1 ^ rs2, pc ← pc + 4

OR = 4

rd ← rs1 | rs2, pc ← pc + 4

AND = 5

rd ← rs1 & rs2, pc ← pc + 4

SLL = 6

rd ← rs1 << rs2, pc ← pc + 4

SRL = 7

rd ← rs1 >> rs2 (logical), pc ← pc + 4

SRA = 8

rd ← rs1 >> rs2 (arithmetic), pc ← pc + 4

SLT = 9

rd ← (rs1 < rs2) ? 1 : 0 (signed), pc ← pc + 4

SLTU = 10

rd ← (rs1 < rs2) ? 1 : 0 (unsigned), pc ← pc + 4

MUL = 11

rd ← rs1 * rs2 (signed), pc ← pc + 4

MULH = 12

rd ← rs1 * rs2 (half), pc ← pc + 4

MULHU = 13

rd ← rs1 * rs2 (half unsigned), pc ← pc + 4

MULHSU = 14

rd ← rs1 * rs2 (half signed unsigned), pc ← pc + 4

DIV = 15

rd ← rs1 / rs2 (signed), pc ← pc + 4

DIVU = 16

rd ← rs1 / rs2 (unsigned), pc ← pc + 4

REM = 17

rd ← rs1 % rs2 (signed), pc ← pc + 4

REMU = 18

rd ← rs1 % rs2 (unsigned), pc ← pc + 4

LB = 19

rd ← sx(m8(rs1 + imm)), pc ← pc + 4

LH = 20

rd ← sx(m16(rs1 + imm)), pc ← pc + 4

LW = 21

rd ← sx(m32(rs1 + imm)), pc ← pc + 4

LBU = 22

rd ← zx(m8(rs1 + imm)), pc ← pc + 4

LHU = 23

rd ← zx(m16(rs1 + imm)), pc ← pc + 4

SB = 24

m8(rs1 + imm) ← rs2[7:0], pc ← pc + 4

SH = 25

m16(rs1 + imm) ← rs2[15:0], pc ← pc + 4

SW = 26

m32(rs1 + imm) ← rs2[31:0], pc ← pc + 4

BEQ = 27

pc ← pc + ((rs1 == rs2) ? imm : 4)

BNE = 28

pc ← pc + ((rs1 != rs2) ? imm : 4)

BLT = 29

pc ← pc + ((rs1 < rs2) ? imm : 4) (signed)

BGE = 30

pc ← pc + ((rs1 >= rs2) ? imm : 4) (signed)

BLTU = 31

pc ← pc + ((rs1 < rs2) ? imm : 4) (unsigned)

BGEU = 32

pc ← pc + ((rs1 >= rs2) ? imm : 4) (unsigned)

JAL = 33

rd ← pc + 4, pc ← pc + imm

JALR = 34

rd ← pc + 4, pc ← (rs1 + imm) & ∼1

AUIPC = 35

rd ← pc + imm, pc ← pc + 4

LUI = 36

rd ← imm, pc ← pc + 4

ECALL = 37

Transfer control to the ecall handler.

EBREAK = 38

Transfer control to the debugger.

ADDW = 39

rd ← rs1 + rs2, pc ← pc + 4

SUBW = 40

rd ← rs1 - rs2, pc ← pc + 4

SLLW = 41

rd ← rs1 << rs2, pc ← pc + 4

SRLW = 42

rd ← rs1 >> rs2 (logical), pc ← pc + 4

SRAW = 43

rd ← rs1 >> rs2 (arithmetic), pc ← pc + 4

LWU = 44

rd ← sx(m32(rs1 + imm)), pc ← pc + 4

LD = 45

rd ← sx(m8(rs1 + imm)), pc ← pc + 4

SD = 46

m8(rs1 + imm) ← rs2[7:0], pc ← pc + 4

MULW = 47

rd ← rs1 + imm, pc ← pc + 4

DIVW = 48

rd ← rs1 / rs2 (signed), pc ← pc + 4

DIVUW = 49

rd ← rs1 / rs2 (unsigned), pc ← pc + 4

REMW = 50

rd ← rs1 % rs2 (signed), pc ← pc + 4

REMUW = 51

rd ← rs1 % rs2 (unsigned), pc ← pc + 4

UNIMP = 52

Unimplemented instruction.

Implementations§

impl Opcode

pub const fn mnemonic(&self) -> &str

Get the mnemonic for the opcode.

pub fn as_field<F: Field>(self) -> F

Convert the opcode to a field element.

pub fn funct3(self: Opcode) -> Option<u8>

Returns the funct3 field for the opcode.

pub fn funct7(self: Opcode) -> Option<u8>

Returns the funct7 field for the opcode.

pub fn funct12(self: Opcode) -> Option<u32>

Returns the funct12 field for the opcode.

pub fn base_opcode(self: Opcode) -> (u32, Option<u32>)

Returns the base opcode for the opcode.

pub fn instruction_type(self) -> (InstructionType, Option<InstructionType>)

Returns the instruction type for the opcode.

Trait Implementations§

impl Clone for Opcode

fn clone(&self) -> Opcode

Returns a duplicate of the value. Read more

1.0.0 · Source§

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source. Read more

impl Debug for Opcode

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl DeepSizeOf for Opcode

fn deep_size_of_children(&self, context: &mut Context) -> usize

Returns an estimation of the heap-managed storage of this object. This does not include the size of the object itself. Read more

fn deep_size_of(&self) -> usize

Returns an estimation of a total size of memory owned by the object, including heap-managed storage. Read more

impl<'de> Deserialize<'de> for Opcode

fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
where __D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer. Read more

impl Display for Opcode

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more

impl Enum for Opcode

const LENGTH: usize

Length of the enum.

fn from_usize(value: usize) -> Self

Takes an usize, and returns an element matching into_usize function.

fn into_usize(self) -> usize

Returns an unique identifier for a value within range of 0..Array::LENGTH.

impl<V> EnumArray<V> for Opcode

type Array = [V; 53]

Representation of an enum map for type V.

impl From<Opcode> for ByteOpcode

fn from(value: Opcode) -> Self

Convert an opcode to a byte opcode.

impl Hash for Opcode

fn hash<H: Hasher>(&self, state: &mut H)

Feeds this value into the given Hasher. Read more

1.3.0 · Source§

fn hash_slice<H>(data: &[Self], state: &mut H)
where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher. Read more

impl Ord for Opcode

fn cmp(&self, other: &Opcode) -> Ordering

This method returns an Ordering between self and other. Read more

1.21.0 · Source§

fn max(self, other: Self) -> Self
where Self: Sized,

Compares and returns the maximum of two values. Read more

1.21.0 · Source§

fn min(self, other: Self) -> Self
where Self: Sized,

Compares and returns the minimum of two values. Read more

1.50.0 · Source§

fn clamp(self, min: Self, max: Self) -> Self
where Self: Sized,

Restrict a value to a certain interval. Read more

impl PartialEq for Opcode

fn eq(&self, other: &Opcode) -> bool

Tests for self and other values to be equal, and is used by ==.

1.0.0 · Source§

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl PartialOrd for Opcode

fn partial_cmp(&self, other: &Opcode) -> Option<Ordering>

This method returns an ordering between self and other values if one exists. Read more

1.0.0 · Source§

fn lt(&self, other: &Rhs) -> bool

Tests less than (for self and other) and is used by the < operator. Read more

1.0.0 · Source§

fn le(&self, other: &Rhs) -> bool

Tests less than or equal to (for self and other) and is used by the <= operator. Read more

1.0.0 · Source§

fn gt(&self, other: &Rhs) -> bool

Tests greater than (for self and other) and is used by the > operator. Read more

1.0.0 · Source§

fn ge(&self, other: &Rhs) -> bool

Tests greater than or equal to (for self and other) and is used by the >= operator. Read more

impl Serialize for Opcode

fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
where S: Serializer,

Serialize this value into the given Serde serializer. Read more

impl Copy for Opcode

impl Eq for Opcode

impl StructuralPartialEq for Opcode

Auto Trait Implementations§

impl Freeze for Opcode

impl RefUnwindSafe for Opcode

impl Send for Opcode

impl Sync for Opcode

impl Unpin for Opcode

impl UnsafeUnpin for Opcode

impl UnwindSafe for Opcode

Blanket Implementations§

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where T: 'static + ?Sized,

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

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Immutably borrows from an owned value. Read more

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Mutably borrows from an owned value. Read more

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where T: Clone,

unsafe fn clone_to_uninit(&self, dest: *mut u8)

🔬This is a nightly-only experimental API. (clone_to_uninit)

Performs copy-assignment from self to dest. Read more

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fn conv<T>(self) -> T
where Self: Into<T>,

Converts self into T using Into<T>. Read more

impl<Q, K> Equivalent<K> for Q
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fn equivalent(&self, key: &K) -> bool

Checks if this value is equivalent to the given key. Read more

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fn fmt_binary(self) -> FmtBinary<Self>
where Self: Binary,

Causes self to use its Binary implementation when Debug-formatted.

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where Self: Display,

Causes self to use its Display implementation when Debug-formatted.

fn fmt_lower_exp(self) -> FmtLowerExp<Self>
where Self: LowerExp,

Causes self to use its LowerExp implementation when Debug-formatted.

fn fmt_lower_hex(self) -> FmtLowerHex<Self>
where Self: LowerHex,

Causes self to use its LowerHex implementation when Debug-formatted.

fn fmt_octal(self) -> FmtOctal<Self>
where Self: Octal,

Causes self to use its Octal implementation when Debug-formatted.

fn fmt_pointer(self) -> FmtPointer<Self>
where Self: Pointer,

Causes self to use its Pointer implementation when Debug-formatted.

fn fmt_upper_exp(self) -> FmtUpperExp<Self>
where Self: UpperExp,

Causes self to use its UpperExp implementation when Debug-formatted.

fn fmt_upper_hex(self) -> FmtUpperHex<Self>
where Self: UpperHex,

Causes self to use its UpperHex implementation when Debug-formatted.

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Formats each item in a sequence. Read more

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Returns the argument unchanged.

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