Struct TracingVM 

pub struct TracingVM<'a> {
    pub core: CoreVM<'a>,
    pub local_memory_access: LocalMemoryAccess,
    pub precompile_local_memory_access: Option<LocalMemoryAccess>,
    pub record: &'a mut ExecutionRecord,
}

A RISC-V VM that uses a MinimalTrace to create a ExecutionRecord.

Fields

core: CoreVM<'a>

The core VM.

local_memory_access: LocalMemoryAccess

The local memory access for the CPU.

precompile_local_memory_access: Option<LocalMemoryAccess>

The local memory access for any deferred precompiles.

record: &'a mut ExecutionRecord

The execution record were populating.

Implementations

impl TracingVM<'_>

pub fn execute(&mut self) -> Result<CycleResult, ExecutionError>

Execute the program until it halts.

pub fn execute_instruction(&mut self) -> Result<CycleResult, ExecutionError>

Execute the next instruction at the current PC.

pub fn registers(&self) -> &[MemoryRecord; 32]

Get the current registers (immutable).

pub fn registers_mut(&mut self) -> &mut [MemoryRecord; 32]

This object is used to read and write memory in a precompile.

impl<'a> TracingVM<'a>

pub fn new<T: MinimalTrace>( trace: &'a T, program: Arc<Program>, opts: SP1CoreOpts, proof_nonce: [u32; 4], record: &'a mut ExecutionRecord, ) -> Self

Create a new full-tracing VM from a minimal trace.

pub fn public_values(&self) -> &PublicValues<u32, u64, u64, u32>

Get the public values from the record.

pub fn execute_load( &mut self, instruction: &Instruction, ) -> Result<(), ExecutionError>

Execute a load instruction.

This method will update the local memory access for the memory read, the register read, and the register write.

It will also emit the memory instruction event and the events for the load instruction.