Struct Pl011 

pub struct Pl011 { /* private fields */ }

PL011 UART 驱动结构体

Implementations

impl Pl011

pub fn new_no_clock(base: NonNull<u8>) -> Self

创建新的 PL011 实例（仅基地址，使用默认配置）

Arguments

• base - UART 寄存器基地址

pub fn new(base: NonNull<u8>, clock_freq: u32) -> Self

pub fn open(&mut self) -> Result<(), ConfigError>

初始化 PL011 UART

pub fn set_irq_mask(&mut self, events: SerialEventSet)

pub fn get_irq_mask(&self) -> SerialEventSet

pub fn pending(&mut self, direction: SerialDirection) -> bool

pub fn poll_status(&mut self) -> SerialEvent

pub fn try_write(&mut self, bytes: &[u8]) -> usize

pub fn try_read(&mut self, bytes: &mut [u8]) -> Result<usize, TransBytesError>

pub fn write_byte(&mut self, byte: u8)

pub fn read_byte( &mut self, status: SerialEvent, ) -> Option<Result<u8, TransferError>>

pub fn read_rx(&mut self) -> Option<RxSample>

pub fn enable_fifo(&self, enable: bool)

启用或禁用 FIFO

pub fn set_fifo_trigger_level(&self, rx_level: u8, tx_level: u8)

设置 FIFO 触发级别

Trait Implementations

impl PollingUart for Pl011

fn poll_status(&mut self) -> SerialEvent

fn write_byte(&mut self, byte: u8)

fn read_byte( &mut self, status: SerialEvent, ) -> Option<Result<u8, TransferError>>

impl SplitUart for Pl011

type Control = Pl011

type Irq = Pl011Irq

type EmergencyTx = Pl011EmergencyTx

fn runtime_info(&self) -> UartInfo

fn split(self) -> SerialParts<Self::Control, Self::Irq, Self::EmergencyTx>

impl UartPort for Pl011

fn startup(&mut self, config: &Config) -> Result<(), ConfigError>

Initializes the UART while leaving every device interrupt source masked.

fn shutdown(&mut self)

fn set_config(&mut self, config: &Config) -> Result<(), ConfigError>

fn read_rx(&mut self) -> Option<RxSample>

Reads one normalized hardware sample without consulting IRQ state.

fn discard_rx(&mut self)

Discards bytes and error state pending in the hardware receiver.

fn discard_tx(&mut self) -> bool

Discards bytes queued in the hardware transmitter. A byte already in the shift register may still complete. Returns whether the hardware supports an independent TX-only discard.

fn write_tx(&mut self, bytes: &[u8]) -> usize

Writes as much of bytes as the hardware can currently accept.

fn tx_idle(&mut self) -> bool

Returns whether both the FIFO and transmitter shift register are empty.

fn mask(&mut self, sources: SerialEventSet)

Masks only the requested device-local interrupt sources.

fn mask_all(&mut self)

fn rearm(&mut self, sources: SerialEventSet) -> SerialEventSet

Rearms sources and closes the enable/readiness race.