Struct smbioslib::SMBiosCacheInformation[][src]

pub struct SMBiosCacheInformation<'a> { /* fields omitted */ }
Expand description

Cache Information (Type 7)

This structure defines the attributes of CPU cache device in the system. One structure is specified for each such device, whether the device is internal to or external to the CPU module. Cache modules can be associated with a processor structure in one or two ways depending on the SMBIOS version

Compliant with: DMTF SMBIOS Reference Specification 3.4.0 (DSP0134) Document Date: 2020-07-17

Implementations

String number for reference designation

Bit fields describing the cache configuration

Maximum size that can be installed

Same format as Max Cache Size field; set to 0 if no cache is installed

Supported SRAM type

Current SRAM type

Cache module speed, in nanoseconds. The value is 0 if the speed is unknown.

Error-correction scheme supported by this cache component

Logical type of cache

Associativity of the cache

Maximum cache size

Installed cache size

Trait Implementations

Formats the value using the given formatter. Read more

The SMBIOS structure type Read more

Creates a new instance of the implementing SMBIOS type

Contains the standard parts/sections of the implementing SMBIOS type.

Serialize this value into the given Serde serializer. Read more

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.