Crate sim_lib_audio_graph_core 

Pure Rust audio processor graph primitives.

The core graph is hardware-free: callers provide processors, prepare the graph, and can render deterministic offline blocks in tests or previews.

use sim_lib_audio_graph_core::{
    Graph, PrepareConfig, ProcessBlock, Processor,
};

#[derive(Default)]
struct CopyNode;

impl Processor for CopyNode {
    fn prepare(&mut self, _cfg: PrepareConfig) {}

    fn reset(&mut self) {}

    fn process(&mut self, block: &mut ProcessBlock<'_>) {
        let frames = block.frames as usize;
        for (input, output) in block.in_audio.iter().zip(block.out_audio.iter_mut()) {
            output[..frames].copy_from_slice(&input[..frames]);
        }
    }
}

let mut graph = Graph::new();
graph.add_node("copy", Box::<CopyNode>::default(), 1, 1).unwrap();
graph.prepare(48_000, 4).unwrap();

let output = graph.process_offline(&[vec![0.25, -0.5]], 2).unwrap();
assert_eq!(output, vec![vec![0.25, -0.5]]);

Structs

AudioGraphNodeConfig

Citizen descriptor wrapping a single PatchNode configuration.

AudioGraphPatchDescriptor

Citizen descriptor wrapping a whole Patch.

BlockArena

Bump allocator for per-block f32 scratch buffers.

BridgeLatency

Latency a bridge incurs, measured in frames and packets.

Cable

A directed connection from one node’s output port to another’s input port.

DomainBridgeDescriptor

Full description of one domain bridge: its kind, the input and output rate contracts it joins, the latency it costs, and its diagnostic symbols.

DomainBridgeProcessor

A Processor that bridges between clock domains or rate contracts.

Graph

A directed audio processor graph: nodes plus the cables between their ports.

NullEventSink

An EventSink that discards every event.

Patch

Portable, serializable description of a graph: its nodes and cables.

PatchNode

Portable description of one graph node: its id and channel counts.

PortDecl

Declaration of one port on a processor: name, media, direction, channel count, and rate contract.

PortUri

A structured URI identifying a single channel of a port.

PrepareConfig

Configuration handed to each processor at prepare time: the sample rate, maximum block size, and channel counts.

ProcessBlock

One processing block handed to a Processor: input and output audio lanes, event streams, transport state, and a scratch arena.

ProcessorDescriptor

Static description of a processor’s clocking, latency, pinning, and ports.

RateContract

Timing agreement a stream port advertises and must share to connect.

Transport

Transport state delivered to processors per block.

Enums

BlockEvent

An event delivered to or emitted by a processor within a block, timestamped by a sample offset into the block.

ClockDomain

Clock a stream is timed against.

DomainBridgeKind

Reconciliation strategy a domain bridge uses to cross between rate contracts.

LatencyClass

Real-time latency promise a transport profile makes.

PortDir

Direction of a port relative to its node.

PortMedia

Kind of signal a port carries.

Traits

EventSink

Sink that accepts events emitted by a processor during a block.

Processor

A node behavior in the audio graph: prepared once, then processes blocks.

Functions

audio_graph_node_config_class_symbol

Returns the class symbol under which node configs register as citizens.

audio_graph_patch_class_symbol

Returns the class symbol under which patches register as citizens.