Struct ShiftRegister40

pub struct ShiftRegister40<Pin1, Pin2, Pin3>
where
    Pin1: OutputPin,
    Pin2: OutputPin,
    Pin3: OutputPin,
{ /* private fields */ }

Serial-in parallel-out shift register

Implementations

impl<Pin1, Pin2, Pin3> ShiftRegister40<Pin1, Pin2, Pin3>

where Pin1: OutputPin, Pin2: OutputPin, Pin3: OutputPin,

pub fn new(clock: Pin1, latch: Pin2, data: Pin3) -> Self

Creates a new SIPO shift register from clock, latch, and data output pins

pub fn decompose(&self) -> [ShiftRegisterPin<'_>; 40]

Get embedded-hal output pins to control the shift register outputs

pub fn release(self) -> (Pin1, Pin2, Pin3)

Consume the shift register and return the original clock, latch, and data output pins