Type Alias W 

pub type W = W<DcrSpec>;

Register DCR writer

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn rbsize(&mut self) -> RbsizeW<'_, DcrSpec>

Bits 0:2 - Row boundary size. 0 - no row boundary, n - row boundary at 2^(n+3) bytes

pub fn dqse(&mut self) -> DqseW<'_, DcrSpec>

Bit 3 - DQS enable. Setting to 1 indicates device provides DQS signal for Rx data latching

pub fn hyper(&mut self) -> HyperW<'_, DcrSpec>

Bit 4 - HyperBus protocol

pub fn xlegacy(&mut self) -> XlegacyW<'_, DcrSpec>

Bit 5 - Xccela legacy protocol

pub fn cslmax(&mut self) -> CslmaxW<'_, DcrSpec>

Bits 6:17 - Maximum CS low active time. 0 - no limit, n - (n+1) cycles

pub fn cslmin(&mut self) -> CslminW<'_, DcrSpec>

Bits 18:21 - Minimum CS low active time. N - (n+1) cycles

pub fn cshmin(&mut self) -> CshminW<'_, DcrSpec>

Bits 22:25 - Minimum CS high deselect time. 0 - one cycle, 1 - two cycles, etc.

pub fn trcmin(&mut self) -> TrcminW<'_, DcrSpec>

Bits 26:30 - Write/Read cycle minimum time

pub fn fixlat(&mut self) -> FixlatW<'_, DcrSpec>

Bit 31 - Indicate PSRAM is fixed latency or variable latency