Module mpi2

Module mpi2 

Source
Expand description

MPI2

Modules§

aaear
aaoar
aasar
abr1
Alternate Byte Register
abr2
Alternate Byte Register
apm32cr
APM32 Control Register
ar1
Address Register
ar2
Address Register
calcr
Calibration Control Register
caldor
ccr1
Communication Configuration Register
ccr2
Communication Configuration Register
cir
Command Interval Register
cmdr1
Command Register
cmdr2
Command Register
cr
Control Register
cr2
ctrear
ctrsar
dcr
Device Control Register
dlr1
Data Length Register
dlr2
Data Length Register
dr
Data Register
fifocr
FIFO Control Register
hcmdr
AHB Command Register
hrabr
AHB Read Alternate Byte Register
hrccr
AHB Read Communication Configuration Register
hwabr
AHB Write Alternate Byte Register
hwccr
AHB Write Communication Configuration Register
miscr
Miscelaneous Register
noncea
nonceb
prear
prsar
psclr
Prescaler Register
scr
Status Clear Register
smkr
Status Mask Register
smr
Status Match Register
sr
Status Register
timr
wdtr
WDT Register

Structs§

RegisterBlock
Register block

Type Aliases§

Aaear
AAEAR (rw) register accessor:
Aaoar
AAOAR (rw) register accessor:
Aasar
AASAR (rw) register accessor:
Abr1
ABR1 (rw) register accessor: Alternate Byte Register
Abr2
ABR2 (rw) register accessor: Alternate Byte Register
Apm32cr
APM32CR (rw) register accessor: APM32 Control Register
Ar1
AR1 (rw) register accessor: Address Register
Ar2
AR2 (rw) register accessor: Address Register
Calcr
CALCR (rw) register accessor: Calibration Control Register
Caldor
CALDOR (rw) register accessor:
Ccr1
CCR1 (rw) register accessor: Communication Configuration Register
Ccr2
CCR2 (rw) register accessor: Communication Configuration Register
Cir
CIR (rw) register accessor: Command Interval Register
Cmdr1
CMDR1 (rw) register accessor: Command Register
Cmdr2
CMDR2 (rw) register accessor: Command Register
Cr
CR (rw) register accessor: Control Register
Cr2
CR2 (rw) register accessor:
Ctrear
CTREAR (rw) register accessor:
Ctrsar
CTRSAR (rw) register accessor:
Dcr
DCR (rw) register accessor: Device Control Register
Dlr1
DLR1 (rw) register accessor: Data Length Register
Dlr2
DLR2 (rw) register accessor: Data Length Register
Dr
DR (rw) register accessor: Data Register
Fifocr
FIFOCR (rw) register accessor: FIFO Control Register
Hcmdr
HCMDR (rw) register accessor: AHB Command Register
Hrabr
HRABR (rw) register accessor: AHB Read Alternate Byte Register
Hrccr
HRCCR (rw) register accessor: AHB Read Communication Configuration Register
Hwabr
HWABR (rw) register accessor: AHB Write Alternate Byte Register
Hwccr
HWCCR (rw) register accessor: AHB Write Communication Configuration Register
Miscr
MISCR (rw) register accessor: Miscelaneous Register
Noncea
NONCEA (rw) register accessor:
Nonceb
NONCEB (rw) register accessor:
Prear
PREAR (rw) register accessor:
Prsar
PRSAR (rw) register accessor:
Psclr
PSCLR (rw) register accessor: Prescaler Register
Scr
SCR (rw) register accessor: Status Clear Register
Smkr
SMKR (rw) register accessor: Status Mask Register
Smr
SMR (rw) register accessor: Status Match Register
Sr
SR (rw) register accessor: Status Register
Timr
TIMR (rw) register accessor:
Wdtr
WDTR (rw) register accessor: WDT Register