Module dcr

Module dcr 

Source
Expand description

Device Control Register

Structs§

DcrSpec
Device Control Register

Type Aliases§

CshminR
Field CSHMIN reader - Minimum CS high deselect time. 0 - one cycle, 1 - two cycles, etc.
CshminW
Field CSHMIN writer - Minimum CS high deselect time. 0 - one cycle, 1 - two cycles, etc.
CslmaxR
Field CSLMAX reader - Maximum CS low active time. 0 - no limit, n - (n+1) cycles
CslmaxW
Field CSLMAX writer - Maximum CS low active time. 0 - no limit, n - (n+1) cycles
CslminR
Field CSLMIN reader - Minimum CS low active time. N - (n+1) cycles
CslminW
Field CSLMIN writer - Minimum CS low active time. N - (n+1) cycles
DqseR
Field DQSE reader - DQS enable. Setting to 1 indicates device provides DQS signal for Rx data latching
DqseW
Field DQSE writer - DQS enable. Setting to 1 indicates device provides DQS signal for Rx data latching
FixlatR
Field FIXLAT reader - Indicate PSRAM is fixed latency or variable latency
FixlatW
Field FIXLAT writer - Indicate PSRAM is fixed latency or variable latency
HyperR
Field HYPER reader - HyperBus protocol
HyperW
Field HYPER writer - HyperBus protocol
R
Register DCR reader
RbsizeR
Field RBSIZE reader - Row boundary size. 0 - no row boundary, n - row boundary at 2^(n+3) bytes
RbsizeW
Field RBSIZE writer - Row boundary size. 0 - no row boundary, n - row boundary at 2^(n+3) bytes
TrcminR
Field TRCMIN reader - Write/Read cycle minimum time
TrcminW
Field TRCMIN writer - Write/Read cycle minimum time
W
Register DCR writer
XlegacyR
Field XLEGACY reader - Xccela legacy protocol
XlegacyW
Field XLEGACY writer - Xccela legacy protocol