Type Alias W 

pub type W = W<CrSpec>;

Register CR writer

Aliased Type

pub struct W { /* private fields */ }

Implementations

impl W

pub fn en(&mut self) -> EnW<'_, CrSpec>

Bit 0 - Enable MPI

pub fn rsvd5(&mut self) -> Rsvd5W<'_, CrSpec>

Bits 1:4

pub fn dmae(&mut self) -> DmaeW<'_, CrSpec>

Bit 5 - DMA enable in FIFO mode

pub fn ctre(&mut self) -> CtreW<'_, CrSpec>

Bit 6 - AES-CTR on-the-fly decryption enable

pub fn ctrm(&mut self) -> CtrmW<'_, CrSpec>

Bit 7 - AES-CTR mode. 0 - AES128, 1 - AES256

pub fn tcie(&mut self) -> TcieW<'_, CrSpec>

Bit 8 - Transfer complete interrupt enable

pub fn rsvd4(&mut self) -> Rsvd4W<'_, CrSpec>

Bits 9:10

pub fn smie(&mut self) -> SmieW<'_, CrSpec>

Bit 11 - Status match interrupt enable

pub fn rsvd3(&mut self) -> Rsvd3W<'_, CrSpec>

Bits 12:15

pub fn cmd2e(&mut self) -> Cmd2eW<'_, CrSpec>

Bit 16 - Enable CMD2. If set to 1, CMD2 will be issued after CMD1 with an interval of TI2

pub fn sme1(&mut self) -> Sme1W<'_, CrSpec>

Bit 17 - Status match enable. SME[0] enables CMD1, SME[1] enable CMD2. Only one CMD can be used as SM CMD

pub fn sme2(&mut self) -> Sme2W<'_, CrSpec>

Bit 18

pub fn smm(&mut self) -> SmmW<'_, CrSpec>

Bit 19 - Status match mode: 0 - AND mode; 1 - OR mode

pub fn hwife(&mut self) -> HwifeW<'_, CrSpec>

Bit 20 - Hardware interface enable

pub fn opie(&mut self) -> OpieW<'_, CrSpec>

Bit 21 - OPI interface enable

pub fn rsvd2(&mut self) -> Rsvd2W<'_, CrSpec>

Bit 22

pub fn mx16(&mut self) -> Mx16W<'_, CrSpec>

Bit 23 - Mode X16

pub fn dfm(&mut self) -> DfmW<'_, CrSpec>

Bit 24 - Dual Flash Mode

pub fn rsvd(&mut self) -> RsvdW<'_, CrSpec>

Bits 25:30

pub fn abort(&mut self) -> AbortW<'_, CrSpec>

Bit 31