Expand description
Physical SD/SDIO/MMC host-bus transaction traits.
This crate intentionally models the shared CMD/DAT bus rather than a card,
block device, filesystem, or runtime queue. A host accepts one transaction
at a time: a command, an optional data phase, and a task-side poll path to
observe completion. Higher-level SD/MMC card protocols live in
sdmmc-protocol.
Structs§
- ClockHz
- Concrete clock frequency request.
- Command
- SD/SDIO/MMC command packet submitted on the CMD line.
- Data
Phase - Optional data phase associated with a command.
- DmaPhase
Error - Error returned while constructing an owned-DMA data phase.
- RawResponse
- Raw response words harvested by a host controller.
- Submit
Transaction Error - Submit failure for an owned transaction.
- Transaction
- One physical bus transaction: a command and an optional data phase.
Enums§
- BusOp
- Non-data bus operation that may itself need asynchronous completion.
- BusWidth
- SD/SDIO/MMC bus width.
- Clock
Speed - Named card clock modes used by SD/MMC protocol state machines.
- Data
Buffer - Caller-owned data buffer tied to an in-flight transaction lifetime.
- Data
Direction - Direction of a data phase on DAT lines.
- Error
- Host/bus-layer error.
- Poll
Request Error - Error returned when a request is polled through the wrong handle or after its terminal state.
- Request
Poll - Result of advancing a submitted request once.
- Response
Type - Command response shape expected from the card.
- Signal
Voltage - Bus signaling voltage.
Traits§
- Sdio
Host - Physical SD/SDIO/MMC host bus.