[−][src]Type Definition rv32m1_ri5cy_pac::trgmux0::lpit0::W
type W = W<u32, LPIT0>;
Writer for register LPIT0
Methods
impl W[src]
pub fn sel0(&mut self) -> SEL0_W[src]
Bits 0:5 - Trigger MUX Input 0 Source Select
pub fn sel1(&mut self) -> SEL1_W[src]
Bits 8:13 - Trigger MUX Input 1 Source Select
pub fn sel2(&mut self) -> SEL2_W[src]
Bits 16:21 - Trigger MUX Input 2 Source Select
pub fn sel3(&mut self) -> SEL3_W[src]
Bits 24:29 - Trigger MUX Input 3 Source Select
pub fn lk(&mut self) -> LK_W[src]
Bit 31 - TRGMUX register lock.