[−][src]Type Definition rv32m1_ri5cy_pac::trgmux0::lpit0::R
type R = R<u32, LPIT0>;
Reader of register LPIT0
Methods
impl R[src]
pub fn sel0(&self) -> SEL0_R[src]
Bits 0:5 - Trigger MUX Input 0 Source Select
pub fn sel1(&self) -> SEL1_R[src]
Bits 8:13 - Trigger MUX Input 1 Source Select
pub fn sel2(&self) -> SEL2_R[src]
Bits 16:21 - Trigger MUX Input 2 Source Select
pub fn sel3(&self) -> SEL3_R[src]
Bits 24:29 - Trigger MUX Input 3 Source Select
pub fn lk(&self) -> LK_R[src]
Bit 31 - TRGMUX register lock.