Struct rust_hdl::prelude::PulseWidthModulator

pub struct PulseWidthModulator<const N: usize> {
    pub enable: Signal<In, bool>,
    pub threshold: Signal<In, Bits<N>>,
    pub clock: Signal<In, Clock>,
    pub active: Signal<Out, bool>,
    /* private fields */
}

Fields

enable: Signal<In, bool>

threshold: Signal<In, Bits<N>>

clock: Signal<In, Clock>

active: Signal<Out, bool>

Trait Implementations

impl<const N: usize> Block for PulseWidthModulator<N>

fn connect_all(&mut self)

Connects the internal signals of the circuit - used to initialize the circuit

fn update_all(&mut self)

Propogate changes from inputs to outputs within the circuit

fn has_changed(&self) -> bool

Returns true if anything in the circuit has changed (outputs or internal state)

fn accept(&self, name: &str, probe: &mut dyn Probe)

The visitor pattern - allows a circuit to be probed by a Probe struct.

impl<const N: usize> Default for PulseWidthModulator<N>

fn default() -> PulseWidthModulator<N>

Returns the “default value” for a type.

impl<const N: usize> Logic for PulseWidthModulator<N>

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog

fn timing(&self) -> Vec<TimingInfo, Global>