Struct rust_hdl::widgets::sync_fifo::SynchronousFIFO

pub struct SynchronousFIFO<D: Synth, const N: usize, const NP1: usize, const BLOCK_SIZE: u32> {
    pub clock: Signal<In, Clock>,
    pub read: Signal<In, Bit>,
    pub data_out: Signal<Out, D>,
    pub empty: Signal<Out, Bit>,
    pub almost_empty: Signal<Out, Bit>,
    pub underflow: Signal<Out, Bit>,
    pub write: Signal<In, Bit>,
    pub data_in: Signal<In, D>,
    pub full: Signal<Out, Bit>,
    pub almost_full: Signal<Out, Bit>,
    pub overflow: Signal<Out, Bit>,
    // some fields omitted
}

Fields

clock: Signal<In, Clock>

read: Signal<In, Bit>

data_out: Signal<Out, D>

empty: Signal<Out, Bit>

almost_empty: Signal<Out, Bit>

underflow: Signal<Out, Bit>

write: Signal<In, Bit>

data_in: Signal<In, D>

full: Signal<Out, Bit>

almost_full: Signal<Out, Bit>

overflow: Signal<Out, Bit>

Trait Implementations

impl<D: Synth, const N: usize, const NP1: usize, const BLOCK_SIZE: u32> Block for SynchronousFIFO<D, N, NP1, BLOCK_SIZE>

fn connect_all(&mut self)

fn update_all(&mut self)

fn has_changed(&self) -> bool

fn accept(&self, name: &str, probe: &mut dyn Probe)

impl<D: Default + Synth, const N: usize, const NP1: usize, const BLOCK_SIZE: u32> Default for SynchronousFIFO<D, N, NP1, BLOCK_SIZE>

fn default() -> SynchronousFIFO<D, N, NP1, BLOCK_SIZE>

Returns the “default value” for a type.

impl<D: Synth, const N: usize, const NP1: usize, const BLOCK_SIZE: u32> Logic for SynchronousFIFO<D, N, NP1, BLOCK_SIZE>

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog