Struct rust_hdl_widgets::pulser::Pulser

pub struct Pulser {
    pub clock: Signal<In, Clock>,
    pub enable: Signal<In, Bit>,
    pub pulse: Signal<Out, Bit>,
    /* private fields */
}

Fields

clock: Signal<In, Clock>

enable: Signal<In, Bit>

pulse: Signal<Out, Bit>

Implementations

impl Pulser

pub fn new( clock_rate_hz: u64, pulse_rate_hz: f64, pulse_duration: Duration ) -> Self

Trait Implementations

impl Block for Pulser

fn connect_all(&mut self)

Connects the internal signals of the circuit - used to initialize the circuit

fn update_all(&mut self)

Propogate changes from inputs to outputs within the circuit

fn has_changed(&self) -> bool

Returns true if anything in the circuit has changed (outputs or internal state)

fn accept(&self, name: &str, probe: &mut dyn Probe)

The visitor pattern - allows a circuit to be probed by a Probe struct.

impl Logic for Pulser

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog

fn timing(&self) -> Vec<TimingInfo, Global>