Struct rust_hdl_hls::test_helpers::FaderWithSyncROM

pub struct FaderWithSyncROM {
    pub clock: Signal<In, Clock>,
    pub active: Signal<Out, Bit>,
    pub enable: Signal<In, Bit>,
    /* private fields */
}

Fields

clock: Signal<In, Clock>

active: Signal<Out, Bit>

enable: Signal<In, Bit>

Implementations

impl FaderWithSyncROM

pub fn new(clock_frequency: u64, phase: u32) -> Self

Trait Implementations

impl Block for FaderWithSyncROM

fn connect_all(&mut self)

Connects the internal signals of the circuit - used to initialize the circuit

fn update_all(&mut self)

Propogate changes from inputs to outputs within the circuit

fn has_changed(&self) -> bool

Returns true if anything in the circuit has changed (outputs or internal state)

fn accept(&self, name: &str, probe: &mut dyn Probe)

The visitor pattern - allows a circuit to be probed by a Probe struct.

impl Logic for FaderWithSyncROM

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog

fn timing(&self) -> Vec<TimingInfo, Global>