Struct rust_hdl_fpga_support::lattice::ecp5::output_buffer::OutputBuffer

pub struct OutputBuffer {
    pub i: Signal<In, Bit>,
    pub o: Signal<Out, Bit>,
}

Fields

i: Signal<In, Bit>

o: Signal<Out, Bit>

Trait Implementations

impl Block for OutputBuffer

fn connect_all(&mut self)

Connects the internal signals of the circuit - used to initialize the circuit

fn update_all(&mut self)

Propogate changes from inputs to outputs within the circuit

fn has_changed(&self) -> bool

Returns true if anything in the circuit has changed (outputs or internal state)

fn accept(&self, name: &str, probe: &mut dyn Probe)

The visitor pattern - allows a circuit to be probed by a Probe struct.

impl Clone for OutputBuffer

fn clone(&self) -> OutputBuffer

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for OutputBuffer

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for OutputBuffer

fn default() -> OutputBuffer

Returns the “default value” for a type.

impl Logic for OutputBuffer

fn update(&mut self)

fn connect(&mut self)

fn hdl(&self) -> Verilog

fn timing(&self) -> Vec<TimingInfo, Global>