Struct rust_hdl_core::simulate::Simulation

pub struct Simulation<T> { /* private fields */ }

This type represents a simulation over a circuit T. To simulate a circuit, you will need to construct one of these structs.

Implementations

impl<T: Send + 'static + Block> Simulation<T>

pub fn new() -> Simulation<T>

Construct a simulation struct

pub fn add_clock<F>(&mut self, interval: u64, clock_fn: F)where F: Fn(&mut Box<T>) + Send + 'static + RefUnwindSafe,

Add a clock function to the simulation

Arguments

• interval - the number of picoseconds between calls to the clock closure
• clock_fn - a closure to change the clock state of the circuit

Example

#[derive(LogicBlock)]
struct Foo {
   pub clock: Signal<In, Clock>
}

impl Logic for Foo {
  #[hdl_gen]
  fn update(&mut self) {
  }
}

let mut sim : Simulation<Foo> = Default::default();
sim.add_clock(5, |x| x.clock.next = !x.clock.val()); // Toggles the clock every 5 picoseconds.

pub fn add_phased_clock<F>( &mut self, interval: u64, phase_delay: u64, clock_fn: F )where F: Fn(&mut Box<T>) + Send + 'static + RefUnwindSafe,

Add a phased clock to the simulation

Sometimes you will need to control the phasing of a clock so that it starts at some non-zero time. This method allows you to add a clock to a simulation and control the initial delay.

Arguments

• interval - the delay in picoseconds between the clock function being called
• phase_delay - the number of picoseconds to wait before the clock starts being toggled
• clock_fn - the function that toggles the actual clock.

Example

#[derive(LogicBlock)]
struct Foo {
   pub clock: Signal<In, Clock>
}

impl Logic for Foo {
  #[hdl_gen]
  fn update(&mut self) {
  }
}

let mut sim : Simulation<Foo> = Default::default();
// Toggles every 5 picoseconds, starting after 15 picoseconds
sim.add_phased_clock(5, 15, |x| x.clock.next = !x.clock.val());

pub fn add_testbench<F>(&mut self, testbench: F)where F: Fn(Sim<T>) -> Result<()> + Send + 'static + RefUnwindSafe,

Add a testbench to the simulation

Arguments

• testbench - a testbench function that will be executed through the simulation. Needs to return a simulation Result, be Send and [RefUnwindSafe] (no FFI).

Example

pub fn add_custom_logic<F>(&mut self, logic: F)where F: Fn(&mut T) + 'static,

pub fn endpoint(&mut self) -> Sim<T>

pub fn run(&mut self, x: Box<T>, max_time: u64) -> Result<()>

pub fn run_to_file( &mut self, x: Box<T>, max_time: u64, name: &str ) -> Result<()>

pub fn run_traced<W: Write>( &mut self, x: Box<T>, max_time: u64, trace: W ) -> Result<()>

Trait Implementations

impl<T: Send + 'static + Block> Default for Simulation<T>

fn default() -> Self

Returns the “default value” for a type.