[−][src]Type Definition rp2040::dma::TIMER0
type TIMER0 = Reg<u32, _TIMER0>;
Pacing (X/Y) Fractional Timer\n The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.
This register you can read
, reset
, write
, write_with_zero
, modify
. See API.
For information about available fields see timer0 module