[][src]Type Definition rp2040::dma::TIMER0

type TIMER0 = Reg<u32, _TIMER0>;

Pacing (X/Y) Fractional Timer\n The pacing timer produces TREQ assertions at a rate set by ((X/Y) * sys_clk). This equation is evaluated every sys_clk cycles and therefore can only generate TREQs at a rate of 1 per sys_clk (i.e. permanent TREQ) or less.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see timer0 module

Trait Implementations

impl Readable for TIMER0[src]

read() method returns timer0::R reader structure

impl ResetValue for TIMER0[src]

Register TIMER0 reset()'s with value 0

type Type = u32

Register size

impl Writable for TIMER0[src]

write(|w| ..) method takes timer0::W writer structure