[−][src]Struct rp2040::adc::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub cs: CS,
    pub result: RESULT,
    pub fcs: FCS,
    pub fifo: FIFO,
    pub div: DIV,
    pub intr: INTR,
    pub inte: INTE,
    pub intf: INTF,
    pub ints: INTS,
}

Register block

Fields

cs: CS

0x00 - ADC Control and Status

result: RESULT

0x04 - Result of most recent ADC conversion

fcs: FCS

0x08 - FIFO control and status

fifo: FIFO

0x0c - Conversion result FIFO

div: DIV

0x10 - Clock divider. If non-zero, CS_START_MANY will start conversions\n at regular intervals rather than back-to-back.\n The divider is reset when either of these fields are written.\n Total period is 1 + INT + FRAC / 256

intr: INTR

0x14 - Raw Interrupts

inte: INTE

0x18 - Interrupt Enable

intf: INTF

0x1c - Interrupt Force

ints: INTS

0x20 - Interrupt status after masking & forcing

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