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TimBasicRegs

Struct TimBasicRegs 

Source
pub struct TimBasicRegs {
    pub cr1: Rw<u32>,
    pub cr2: Rw<u32>,
    pub dier: Rw<u32>,
    pub sr: Rw<u32>,
    pub egr: Rw<u32>,
    pub cnt: Rw<u32>,
    pub psc: Rw<u32>,
    pub arr: Rw<u32>,
    /* private fields */
}
Expand description

MMIO layout of one basic timer (TIM6 / TIM7).

Fields§

§cr1: Rw<u32>

0x00 Control Register 1 (CEN, UDIS, URS, OPM, ARPE).

§cr2: Rw<u32>

0x04 Control Register 2 (MMS).

§dier: Rw<u32>

0x0C DMA / Interrupt Enable Register (UIE).

§sr: Rw<u32>

0x10 Status Register (UIF flag).

§egr: Rw<u32>

0x14 Event Generation Register (UG).

§cnt: Rw<u32>

0x24 Counter Register.

§psc: Rw<u32>

0x28 Prescaler Register.

§arr: Rw<u32>

0x2C Auto-Reload Register.

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