Struct FADTFixedFeatureFlags 

pub struct FADTFixedFeatureFlags(/* private fields */);

Fixed ACPI Description Table Fixed Feature Flags

Implementations

impl FADTFixedFeatureFlags

pub const fn wbinvd(&self) -> bool

Processor properly implements a functional equivalent to the WBINVD IA-32 instruction.

If set, signifies that the WBINVD instruction correctly flushes the processor caches, maintains memory coherency, and upon completion of the instruction, all caches for the current processor contain no cached data other than what OSPM references and allows to be cached.

If this flag is not set, the ACPI OS is responsible for disabling all ACPI features that need this function. This field is maintained for ACPI 1.0 processor compatibility on existing systems. Processors in new ACPI-compatible systems are required to support this function and indicate this to OSPM by setting this field.

pub const fn wbinvd_flush(&self) -> bool

If set, indicates that the hardware flushes all caches on the WBINVD instruction and maintains memory coherency, but does not guarantee the caches are invalidated. This provides the complete semantics of the WBINVD instruction, and provides enough to support the system sleeping states.

If neither of the WBINVD flags is set, the system will require FLUSH_SIZE and FLUSH_STRIDE to support sleeping states. If the FLUSH parameters are also not supported, the machine cannot support sleeping states S1, S2, or S3.

pub const fn proc_c1(&self) -> bool

A one indicates that the C1 power state is supported on all processors.

pub const fn p_lvl2_up(&self) -> bool

A zero indicates that the C2 power state is configured to only work on a uniprocessor (UP) system.
A one indicates that the C2 power state is configured to work on a UP or multiprocessor (MP) system.

pub const fn pwr_button(&self) -> bool

A zero indicates the power button is handled as a fixed feature programming model.
A one indicates the power button is handled as a control method device.

If the system does not have a power button, this value would be “1” and no power button device would be present. Independent of the value of this field, the presence of a power button device in the namespace indicates to OSPM that the power button is handled as a control method device.

pub const fn slp_button(&self) -> bool

A zero indicates the sleep button is handled as a fixed feature programming model.
A one indicates the sleep button is handled as a control method device.

If the system does not have a sleep button, this value would be “1” and no sleep button device would be present. Independent of the value of this field, the presence of a sleep button device in the namespace indicates to OSPM that the sleep button is handled as a control method device.

pub const fn fix_rtc(&self) -> bool

A zero indicates the RTC wake status is supported in fixed register space.
A one indicates the RTC wake status is not supported in fixed register space.

pub const fn rtc_s4(&self) -> bool

Indicates whether the RTC alarm function can wake the system from the S4 state.

The RTC must be able to wake the system from an S1, S2, or S3 sleep state. The RTC alarm can optionally support waking the system from the S4 state, as indicated by this value.

pub const fn tmr_val_ext(&self) -> bool

A zero indicates TMR_VAL is implemented as a 24-bit value.
A one indicates TMR_VAL is implemented as a 32-bit value.

The TMR_STS bit is set when the most significant bit of the TMR_VAL toggles.

pub const fn dck_cap(&self) -> bool

A zero indicates that the system cannot support docking.
A one indicates that the system can support docking.

Notice that this flag does not indicate whether or not a docking station is currently present; it only indicates that the system is capable of docking.

pub const fn reset_reg_sup(&self) -> bool

If set, indicates the system supports system reset via the FADT RESET_REG as described in Section 4.8.3.6.

pub const fn sealed_case(&self) -> bool

System Type Attribute.

If set, indicates that the system has no internal expansion capabilities and the case is sealed.

pub const fn headless(&self) -> bool

System Type Attribute.

If set, indicates the system cannot detect the monitor or keyboard/mouse devices.

pub const fn cpu_sw_slp(&self) -> bool

If set, indicates to OSPM that a processor native instruction must be executed after writing the SLP_TYPx register.

pub const fn pci_exp_wak(&self) -> bool

If set, indicates the platform supports the PCIEXP_WAKE_STS bit in the PM1 Status register and the PCIEXP_WAKE_EN bit in the PM1 Enable register.

This bit must be set on platforms containing chipsets that implement PCI Express and supports PM1 PCIEXP_WAK bits.

pub const fn use_platform_clock(&self) -> bool

A value of one indicates that OSPM should use a platform provided timer to drive any monotonically non-decreasing counters, such as OSPM performance counter services. Which particular platform timer will be used is OSPM specific; however, it is recommended that the timer used is based on the following algorithm:

• If the HPET is exposed to OSPM, OSPM should use the HPET.
• Otherwise, OSPM will use the ACPI power management timer.

A value of one indicates that the platform is known to have a correctly implemented ACPI power management timer. A platform may choose to set this flag if a internal processor clock (or clocks in a multi-processor configuration) cannot provide consistent monotonically non-decreasing counters.

Note: If a value of zero is present, OSPM may arbitrarily choose to use an internal processor clock or a platform timer clock for these operations. That is, a zero does not imply that OSPM will necessarily use the internal processor clock to generate a monotonically non-decreasing counter to the system.

pub const fn s4_rtc_sts_valid(&self) -> bool

A one indicates that the contents of the RTC_STS flag is valid when waking the system from S4. See Table 4.11 for more information.

Some existing systems do not reliably set this input today, and this bit allows OSPM to differentiate correctly functioning platforms from platforms with this errata.

pub const fn remote_power_on_capable(&self) -> bool

A one indicates that the platform is compatible with remote power-on. That is, the platform supports OSPM leaving GPE wake events armed prior to an S5 transition.

Some existing platforms do not reliably transition to S5 with wake events enabled (for example, the platform may immediately generate a spurious wake event after completing the S5 transition). This flag allows OSPM to differentiate correctly functioning platforms from platforms with this type of errata.

pub const fn force_apic_cluster_model(&self) -> bool

A one indicates that all local APICs must be configured for the cluster destination model when delivering interrupts in logical mode.

If this bit is set, then logical mode interrupt delivery operation may be undefined until OSPM has moved all local APICs to the cluster model.

Note that the cluster destination model doesn’t apply to Itanium™ Processor Family (IPF) local SAPICs. This bit is intended for xAPIC based machines that require the cluster destination model even when 8 or fewer local APICs are present in the machine.

pub const fn force_apic_physical_destination_mode(&self) -> bool

A one indicates that all local xAPICs must be configured for physical destination mode.

If this bit is set, interrupt delivery operation in logical destination mode is undefined. On machines that contain fewer than 8 local xAPICs or that do not use the xAPIC architecture, this bit is ignored.

pub const fn hw_reduced_acpi(&self) -> bool

A one indicates that the Hardware-Reduced ACPI (section 4.1) is implemented, therefore software-only alternatives are used for supported fixed-features defined in chapter 4.

pub const fn low_power_s0_idle_capable(&self) -> bool

A one informs OSPM that the platform is able to achieve power savings in S0 similar to or better than those typically achieved in S3.

In effect, when this bit is set it indicates that the system will achieve no power benefit by making a sleep transition to S3.

pub const fn persistent_cpu_caches(&self) -> FADTPersistentCPUCacheFeature

The following values describe whether cpu caches and any other caches that are coherent with them, are considered by the platform to be persistent. The platform evaluates the configuration present at system startup to determine this value. System configuration changes after system startup may invalidate this.

• 00b - Not reported by the platform. Software should reference the NFIT Platform Capabilities
• 01b - Cpu caches and any other caches that are coherent with them, are not persistent. Software is responsible for flushing data from cpu caches to make stores persistent. Supersedes NFIT Platform Capabilities.
• 10b - Cpu caches and any other caches that are coherent with them, are persistent. Supersedes NFIT Platform Capabilities. When reporting this state, the platform shall provide enough stored energy for ALL of the following:
  • Time to flush cpu caches and any other caches that are coherent with them
  • Time of all targets of those flushes to complete flushing stored data
  • If supporting hot plug, the worst case CXL device topology that can be hot plugged
• 11b - Reserved

JJ’s note: I made a rust enum just for this 2-bit flag to avoid any sort of confusion when working with this.

Trait Implementations

impl Clone for FADTFixedFeatureFlags

fn clone(&self) -> FADTFixedFeatureFlags

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for FADTFixedFeatureFlags