Enum CpuLevel 

#[non_exhaustive]
pub enum CpuLevel {
    Scalar,
    X86V2,
    X86V3,
    X86V4,
    Neon,
    NeonDotprod,
    NeonI8mm,
    Native,
}

CPU feature level for SIMD dispatch control.

Controls which instruction sets the decoder is allowed to use at runtime. Higher levels include all instructions from lower levels. Setting a level that isn’t available on the current hardware is safe — it falls back to the highest available level below it.

Use CpuLevel::platform_levels() to discover which levels are testable on the current hardware.

Example

use rav1d_safe::src::managed::{Decoder, Settings, CpuLevel};

// Force scalar-only decode (no SIMD)
let mut decoder = Decoder::with_settings(Settings {
    cpu_level: CpuLevel::Scalar,
    ..Default::default()
}).unwrap();

Variants (Non-exhaustive)

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.

Scalar

No SIMD — pure scalar Rust. Works on all platforms. Slowest.

X86V2

x86-64-v2: SSE2 + SSSE3 + SSE4.1. Baseline for most x86-64 CPUs since ~2008.

X86V3

x86-64-v3: V2 + AVX2 + FMA. Haswell (2013) and newer. This is the primary SIMD path for rav1d-safe.

X86V4

x86-64-v4: V3 + AVX-512 (Ice Lake subset). Ice Lake (2019) and newer. Only used for a few functions in rav1d.

Neon

ARM NEON baseline (mandatory on AArch64).

NeonDotprod

ARM NEON + dot product instructions (ARMv8.2+).

NeonI8mm

ARM NEON + i8mm instructions (ARMv8.6+).

Native

Use all features detected at runtime. Default.

Implementations

impl CpuLevel

pub const fn to_mask(self) -> u32

Convert to the raw bitmask for rav1d_set_cpu_flags_mask.

On a platform where the level doesn’t apply (e.g. X86V3 on ARM), returns 0 (scalar).

pub fn platform_levels() -> &'static [CpuLevel]

List all CPU levels relevant to the current platform, from most restrictive (Scalar) to least restrictive (Native).

Only includes levels that differ in behavior on this platform. For example, on x86_64 this returns [Scalar, X86V2, X86V3, X86V4, Native].

pub const fn name(self) -> &'static str

Short human-readable name for this level.

Trait Implementations

impl Clone for CpuLevel

fn clone(&self) -> CpuLevel

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for CpuLevel

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for CpuLevel

fn default() -> Self

Returns the “default value” for a type.

impl Display for CpuLevel

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Hash for CpuLevel

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl PartialEq for CpuLevel

fn eq(&self, other: &CpuLevel) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for CpuLevel

impl Eq for CpuLevel

impl StructuralPartialEq for CpuLevel