Trait GenerateVerilog

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pub trait GenerateVerilog {
    type Out;

    // Required method
    fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>;
}

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Required Methods§

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for ConstInitVal

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for Exp

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for BlockItem

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for GlobalItem

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for Stmt

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for ConstDecl

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for FuncDef

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for LVal

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for Number

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for Block

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for CompUnit

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for Return

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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impl GenerateVerilog for VType

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type Out = ()

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fn generate(&self, code: Rc<RefCell<String>>) -> Result<Self::Out, Error>

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