RegisterBlock

ra6m2::system

Struct RegisterBlock 

Source 
pub struct RegisterBlock {
Show 62 fields
    pub sbycr: SBYCR,
    pub mstpcra: MSTPCRA,
    pub sckdivcr: SCKDIVCR,
    pub sckdivcr2: SCKDIVCR2,
    pub sckscr: SCKSCR,
    pub pllccr: PLLCCR,
    pub pllcr: PLLCR,
    pub bckcr: BCKCR,
    pub mosccr: MOSCCR,
    pub hococr: HOCOCR,
    pub mococr: MOCOCR,
    pub fllcr1: FLLCR1,
    pub fllcr2: FLLCR2,
    pub oscsf: OSCSF,
    pub ckocr: CKOCR,
    pub trckcr: TRCKCR,
    pub ostdcr: OSTDCR,
    pub ostdsr: OSTDSR,
    pub ebckocr: EBCKOCR,
    pub sdckocr: SDCKOCR,
    pub mocoutcr: MOCOUTCR,
    pub hocoutcr: HOCOUTCR,
    pub snzcr: SNZCR,
    pub snzedcr: SNZEDCR,
    pub snzreqcr: SNZREQCR,
    pub opccr: OPCCR,
    pub moscwtcr: MOSCWTCR,
    pub hocowtcr: HOCOWTCR,
    pub sopccr: SOPCCR,
    pub rstsr1: RSTSR1,
    pub lvd1cr1: LVDCR1,
    pub lvd1sr: LVDSR,
    pub lvd2cr1: LVDCR1,
    pub lvd2sr: LVDSR,
    pub prcr: PRCR,
    pub dpsbycr: DPSBYCR,
    pub dpsier0: DPSIER0,
    pub dpsier1: DPSIER1,
    pub dpsier2: DPSIER2,
    pub dpsier3: DPSIER3,
    pub dpsifr0: DPSIFR0,
    pub dpsifr1: DPSIFR1,
    pub dpsifr2: DPSIFR2,
    pub dpsifr3: DPSIFR3,
    pub dpsiegr0: DPSIEGR0,
    pub dpsiegr1: DPSIEGR1,
    pub dpsiegr2: DPSIEGR2,
    pub syocdcr: SYOCDCR,
    pub stconr: STCONR,
    pub rstsr0: RSTSR0,
    pub rstsr2: RSTSR2,
    pub momcr: MOMCR,
    pub fwepror: FWEPROR,
    pub lvcmpcr: LVCMPCR,
    pub lvdlvlr: LVDLVLR,
    pub lvdcr0: [LVDCR0; 2],
    pub sosccr: SOSCCR,
    pub somcr: SOMCR,
    pub lococr: LOCOCR,
    pub locoutcr: LOCOUTCR,
    pub vbtictlr: VBTICTLR,
    pub vbtbkr: [VBTBKR; 512],
    /* private fields */

}
Expand description

Register block

Fields§

§sbycr: SBYCR

0x0c - Standby Control Register

§mstpcra: MSTPCRA

0x1c - Module Stop Control Register A

§sckdivcr: SCKDIVCR

0x20 - System Clock Division Control Register

§sckdivcr2: SCKDIVCR2

0x24 - System Clock Division Control Register 2

§sckscr: SCKSCR

0x26 - System Clock Source Control Register

§pllccr: PLLCCR

0x28 - PLL Clock Control Register

§pllcr: PLLCR

0x2a - PLL Control Register

§bckcr: BCKCR

0x30 - External Bus Clock Control Register

§mosccr: MOSCCR

0x32 - Main Clock Oscillator Control Register

§hococr: HOCOCR

0x36 - High-Speed On-Chip Oscillator Control Register

§mococr: MOCOCR

0x38 - Middle-Speed On-Chip Oscillator Control Register

§fllcr1: FLLCR1

0x39 - FLL Control Register 1

§fllcr2: FLLCR2

0x3a - FLL Control Register 2

§oscsf: OSCSF

0x3c - Oscillation Stabilization Flag Register

§ckocr: CKOCR

0x3e - Clock Out Control Register

§trckcr: TRCKCR

0x3f - Trace Clock Control Register

§ostdcr: OSTDCR

0x40 - Oscillation Stop Detection Control Register

§ostdsr: OSTDSR

0x41 - Oscillation Stop Detection Status Register

§ebckocr: EBCKOCR

0x52 - External Bus Clock Output Control Register

§sdckocr: SDCKOCR

0x53 - SDRAM Clock Output Control Register

§mocoutcr: MOCOUTCR

0x61 - MOCO User Trimming Control Register

§hocoutcr: HOCOUTCR

0x62 - HOCO User Trimming Control Register

§snzcr: SNZCR

0x92 - Snooze Control Register

§snzedcr: SNZEDCR

0x94 - Snooze End Control Register

§snzreqcr: SNZREQCR

0x98 - Snooze Request Control Register

§opccr: OPCCR

0xa0 - Operating Power Control Register

§moscwtcr: MOSCWTCR

0xa2 - Main Clock Oscillator Wait Control Register

§hocowtcr: HOCOWTCR

0xa5 - High-speed on-chip oscillator wait control register

§sopccr: SOPCCR

0xaa - Sub Operating Power Control Register

§rstsr1: RSTSR1

0xc0 - Reset Status Register 1

§lvd1cr1: LVDCR1

0xe0 - Voltage Monitor %s Circuit Control Register 1

§lvd1sr: LVDSR

0xe1 - Voltage Monitor %s Circuit Status Register

§lvd2cr1: LVDCR1

0xe2 - Voltage Monitor %s Circuit Control Register 1

§lvd2sr: LVDSR

0xe3 - Voltage Monitor %s Circuit Status Register

§prcr: PRCR

0x3fe - Protect Register

§dpsbycr: DPSBYCR

0x400 - Deep Standby Control Register

§dpsier0: DPSIER0

0x402 - Deep Standby Interrupt Enable Register 0

§dpsier1: DPSIER1

0x403 - Deep Standby Interrupt Enable Register 1

§dpsier2: DPSIER2

0x404 - Deep Standby Interrupt Enable Register 2

§dpsier3: DPSIER3

0x405 - Deep Standby Interrupt Enable Register 3

§dpsifr0: DPSIFR0

0x406 - Deep Standby Interrupt Flag Register 0

§dpsifr1: DPSIFR1

0x407 - Deep Standby Interrupt Flag Register 1

§dpsifr2: DPSIFR2

0x408 - Deep Standby Interrupt Flag Register 2

§dpsifr3: DPSIFR3

0x409 - Deep Standby Interrupt Flag Register 3

§dpsiegr0: DPSIEGR0

0x40a - Deep Standby Interrupt Edge Register 0

§dpsiegr1: DPSIEGR1

0x40b - Deep Standby Interrupt Edge Register 1

§dpsiegr2: DPSIEGR2

0x40c - Deep Standby Interrupt Edge Register 2

§syocdcr: SYOCDCR

0x40e - System Control OCD Control Register

§stconr: STCONR

0x40f - Standby Condition Register

§rstsr0: RSTSR0

0x410 - Reset Status Register 0

§rstsr2: RSTSR2

0x411 - Reset Status Register 2

§momcr: MOMCR

0x413 - Main Clock Oscillator Mode Oscillation Control Register

§fwepror: FWEPROR

0x416 - Flash P/E Protect Register

§lvcmpcr: LVCMPCR

0x417 - Voltage Monitor Circuit Control Register

§lvdlvlr: LVDLVLR

0x418 - Voltage Detection Level Select Register

§lvdcr0: [LVDCR0; 2]

0x41a - Voltage Monitor %s Circuit Control Register 0

§sosccr: SOSCCR

0x480 - Sub-clock oscillator control register

§somcr: SOMCR

0x481 - Sub Clock Oscillator Mode Control Register

§lococr: LOCOCR

0x490 - Low-Speed On-Chip Oscillator Control Register

§locoutcr: LOCOUTCR

0x492 - LOCO User Trimming Control Register

§vbtictlr: VBTICTLR

0x4bb - VBATT Input Control Register

§vbtbkr: [VBTBKR; 512]

0x500..0x700 - VBATT Backup Register [%s]

Implementations§

Source§

impl RegisterBlock

Source

pub fn lvd1cr0(&self) -> &LVDCR0

0x41a - Voltage Monitor %s Circuit Control Register 0

Source

pub fn lvd2cr0(&self) -> &LVDCR0

0x41b - Voltage Monitor %s Circuit Control Register 0

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