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RegisterBlock

Struct RegisterBlock 

Source
pub struct RegisterBlock {
Show 63 fields pub sbycr: SBYCR, pub mstpcra: MSTPCRA, pub sckdivcr: SCKDIVCR, pub sckscr: SCKSCR, pub pllcr: PLLCR, pub pllccr2: PLLCCR2, pub bckcr: BCKCR, pub memwait: MEMWAIT, pub mosccr: MOSCCR, pub hococr: HOCOCR, pub mococr: MOCOCR, pub oscsf: OSCSF, pub ckocr: CKOCR, pub trckcr: TRCKCR, pub ostdcr: OSTDCR, pub ostdsr: OSTDSR, pub slcdsckcr: SLCDSCKCR, pub ebckocr: EBCKOCR, pub mocoutcr: MOCOUTCR, pub hocoutcr: HOCOUTCR, pub snzcr: SNZCR, pub snzedcr: SNZEDCR, pub snzreqcr: SNZREQCR, pub flstop: FLSTOP, pub psmcr: PSMCR, pub opccr: OPCCR, pub moscwtcr: MOSCWTCR, pub hocowtcr: HOCOWTCR, pub sopccr: SOPCCR, pub rstsr1: RSTSR1, pub bkracr: BKRACR, pub usbckcr: USBCKCR, pub lvd1cr1: LVDCR1, pub lvd1sr: LVDSR, pub lvd2cr1: LVDCR1, pub lvd2sr: LVDSR, pub prcr: PRCR, pub syocdcr: SYOCDCR, pub rstsr0: RSTSR0, pub rstsr2: RSTSR2, pub momcr: MOMCR, pub lvcmpcr: LVCMPCR, pub lvdlvlr: LVDLVLR, pub lvdcr0: [LVDCR0; 2], pub vbtcr1: VBTCR1, pub sosccr: SOSCCR, pub somcr: SOMCR, pub lococr: LOCOCR, pub locoutcr: LOCOUTCR, pub vbtcr2: VBTCR2, pub vbtsr: VBTSR, pub vbtcmpcr: VBTCMPCR, pub vbtlvdicr: VBTLVDICR, pub vbtwctlr: VBTWCTLR, pub vbtwch0otsr: VBTWCH0OTSR, pub vbtwch1otsr: VBTWCH1OTSR, pub vbtwch2otsr: VBTWCH2OTSR, pub vbtictlr: VBTICTLR, pub vbtoctlr: VBTOCTLR, pub vbtwter: VBTWTER, pub vbtwegr: VBTWEGR, pub vbtwfr: VBTWFR, pub vbtbkr: [VBTBKR; 512], /* private fields */
}
Expand description

Register block

Fields§

§sbycr: SBYCR

0x0c - Standby Control Register

§mstpcra: MSTPCRA

0x1c - Module Stop Control Register A

§sckdivcr: SCKDIVCR

0x20 - System Clock Division Control Register

§sckscr: SCKSCR

0x26 - System Clock Source Control Register

§pllcr: PLLCR

0x2a - PLL Control Register

§pllccr2: PLLCCR2

0x2b - PLL Clock Control Register2

§bckcr: BCKCR

0x30 - External Bus Clock Control Register

§memwait: MEMWAIT

0x31 - Memory Wait Cycle Control Register

§mosccr: MOSCCR

0x32 - Main Clock Oscillator Control Register

§hococr: HOCOCR

0x36 - High-Speed On-Chip Oscillator Control Register

§mococr: MOCOCR

0x38 - Middle-Speed On-Chip Oscillator Control Register

§oscsf: OSCSF

0x3c - Oscillation Stabilization Flag Register

§ckocr: CKOCR

0x3e - Clock Out Control Register

§trckcr: TRCKCR

0x3f - Trace Clock Control Register

§ostdcr: OSTDCR

0x40 - Oscillation Stop Detection Control Register

§ostdsr: OSTDSR

0x41 - Oscillation Stop Detection Status Register

§slcdsckcr: SLCDSCKCR

0x50 - Segment LCD Source Clock Control Register

§ebckocr: EBCKOCR

0x52 - External Bus Clock Output Control Register

§mocoutcr: MOCOUTCR

0x61 - MOCO User Trimming Control Register

§hocoutcr: HOCOUTCR

0x62 - HOCO User Trimming Control Register

§snzcr: SNZCR

0x92 - Snooze Control Register

§snzedcr: SNZEDCR

0x94 - Snooze End Control Register

§snzreqcr: SNZREQCR

0x98 - Snooze Request Control Register

§flstop: FLSTOP

0x9e - Flash Operation Control Register

§psmcr: PSMCR

0x9f - Power Save Memory Control Register

§opccr: OPCCR

0xa0 - Operating Power Control Register

§moscwtcr: MOSCWTCR

0xa2 - Main Clock Oscillator Wait Control Register

§hocowtcr: HOCOWTCR

0xa5 - High-Speed On-Chip Oscillator Wait Control Register

§sopccr: SOPCCR

0xaa - Sub Operating Power Control Register

§rstsr1: RSTSR1

0xc0 - Reset Status Register 1

§bkracr: BKRACR

0xc6 - Backup Register Access Control Register

§usbckcr: USBCKCR

0xd0 - USB Clock Control register

§lvd1cr1: LVDCR1

0xe0 - Voltage Monitor %s Circuit Control Register 1

§lvd1sr: LVDSR

0xe1 - Voltage Monitor %s Circuit Status Register

§lvd2cr1: LVDCR1

0xe2 - Voltage Monitor %s Circuit Control Register 1

§lvd2sr: LVDSR

0xe3 - Voltage Monitor %s Circuit Status Register

§prcr: PRCR

0x3fe - Protect Register

§syocdcr: SYOCDCR

0x40e - System Control OCD Control Register

§rstsr0: RSTSR0

0x410 - Reset Status Register 0

§rstsr2: RSTSR2

0x411 - Reset Status Register 2

§momcr: MOMCR

0x413 - Main Clock Oscillator Mode Oscillation Control Register

§lvcmpcr: LVCMPCR

0x417 - Voltage Monitor Circuit Control Register

§lvdlvlr: LVDLVLR

0x418 - Voltage Detection Level Select Register

§lvdcr0: [LVDCR0; 2]

0x41a - Voltage Monitor %s Circuit Control Register 0

§vbtcr1: VBTCR1

0x41f - VBATT Control Register1

§sosccr: SOSCCR

0x480 - Sub-Clock Oscillator Control Register

§somcr: SOMCR

0x481 - Sub Clock Oscillator Mode Control Register

§lococr: LOCOCR

0x490 - Low-Speed On-Chip Oscillator Control Register

§locoutcr: LOCOUTCR

0x492 - LOCO User Trimming Control Register

§vbtcr2: VBTCR2

0x4b0 - VBATT Control Register2

§vbtsr: VBTSR

0x4b1 - VBATT Status Register

§vbtcmpcr: VBTCMPCR

0x4b2 - VBATT Comparator Control Register

§vbtlvdicr: VBTLVDICR

0x4b4 - VBATT Pin Low Voltage Detect Interrupt Control Register

§vbtwctlr: VBTWCTLR

0x4b6 - VBATT Wakeup function Control Register

§vbtwch0otsr: VBTWCH0OTSR

0x4b8 - VBATT Wakeup I/O 0 Output Trigger Select Register

§vbtwch1otsr: VBTWCH1OTSR

0x4b9 - VBATT Wakeup I/O 1 Output Trigger Select Register

§vbtwch2otsr: VBTWCH2OTSR

0x4ba - VBATT Wakeup I/O 2 Output Trigger Select Register

§vbtictlr: VBTICTLR

0x4bb - VBATT Input Control Register

§vbtoctlr: VBTOCTLR

0x4bc - VBATT Output Control Register

§vbtwter: VBTWTER

0x4bd - VBATT Wakeup Trigger source Enable Register

§vbtwegr: VBTWEGR

0x4be - VBATT Wakeup Trigger source Edge Register

§vbtwfr: VBTWFR

0x4bf - VBATT Wakeup trigger source Flag Register

§vbtbkr: [VBTBKR; 512]

0x500..0x700 - VBATT Backup Register [%s]

Implementations§

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impl RegisterBlock

Source

pub fn lvd1cr0(&self) -> &LVDCR0

0x41a - Voltage Monitor %s Circuit Control Register 0

Source

pub fn lvd2cr0(&self) -> &LVDCR0

0x41b - Voltage Monitor %s Circuit Control Register 0

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