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SimdElem

Trait SimdElem 

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pub trait SimdElem<T>: 'static {
    type Simd: Copy;

    const L: usize;
    const MAX: T;

    // Required methods
    fn splat(v: T) -> Self::Simd;
    unsafe fn simd_from_slice(slice: &[T]) -> Self::Simd;
    fn simd_lt_bitmask(a: Self::Simd, b: Self::Simd) -> u64;
    fn lane_indices() -> Self::Simd;
    fn from_usize(n: usize) -> T;
    fn wrapping_add_one(t: T) -> T;
    unsafe fn partition_fast(
        vals: Self::Simd,
        threshold: Self::Simd,
        v: &mut [T],
        v_idx: &mut usize,
        w: &mut [T],
        w_idx: &mut usize,
    );
    unsafe fn partition_slow(
        vals: Self::Simd,
        len: Self::Simd,
        threshold: Self::Simd,
        v: &mut [T],
        v_idx: &mut usize,
        w: &mut [T],
        w_idx: &mut usize,
    );
}
Expand description

The SIMD tag (Avx2 or Avx512) must implement SimdElem<T>.

For now, this means you can only use u32, i32, u64, and i64. A SIMD backend strategy for element type T.

Implemented by Avx2 (8 lanes for 32-bit, 4 lanes for 64-bit) and, when the avx512 feature is enabled, by Avx512 (16 lanes for 32-bit, 8 lanes for 64-bit).

Required Associated Constants§

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const L: usize

Number of SIMD lanes.

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const MAX: T

Maximum value for T.

Required Associated Types§

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type Simd: Copy

The SIMD vector type (e.g. i32x8 or i64x4).

Required Methods§

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fn splat(v: T) -> Self::Simd

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unsafe fn simd_from_slice(slice: &[T]) -> Self::Simd

§Safety

slice must have at least L elements accessible (may read past slice.len()).

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fn simd_lt_bitmask(a: Self::Simd, b: Self::Simd) -> u64

Returns bitmask where bit i = a[i] <= b[i].

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fn lane_indices() -> Self::Simd

Returns a SIMD register [0, 1, 2, ..., L-1].

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fn from_usize(n: usize) -> T

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fn wrapping_add_one(t: T) -> T

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unsafe fn partition_fast( vals: Self::Simd, threshold: Self::Simd, v: &mut [T], v_idx: &mut usize, w: &mut [T], w_idx: &mut usize, )

Partition all L lanes of vals against threshold. Lanes >= threshold go to v, lanes < threshold go to w.

§Safety

v and w must have at least L elements of capacity beyond their current write index.

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unsafe fn partition_slow( vals: Self::Simd, len: Self::Simd, threshold: Self::Simd, v: &mut [T], v_idx: &mut usize, w: &mut [T], w_idx: &mut usize, )

Like partition_fast, but only the first len lanes are in range.

§Safety

Same capacity requirements as partition_fast.

Dyn Compatibility§

This trait is not dyn compatible.

In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.

Implementors§

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impl SimdElem<i32> for Avx2

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const L: usize = 8

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const MAX: i32 = i32::MAX

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type Simd = i32x8

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impl SimdElem<i64> for Avx2

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const L: usize = 4

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const MAX: i64 = i64::MAX

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type Simd = i64x4

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impl SimdElem<u32> for Avx2

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const L: usize = 8

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const MAX: u32 = u32::MAX

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type Simd = u32x8

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impl SimdElem<u64> for Avx2

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const L: usize = 4

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const MAX: u64 = u64::MAX

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type Simd = u64x4

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impl<const CS: bool> SimdElem<i32> for Avx512<CS>

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const L: usize = 16

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const MAX: i32 = i32::MAX

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type Simd = i32x16

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impl<const CS: bool> SimdElem<i64> for Avx512<CS>

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const L: usize = 8

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const MAX: i64 = i64::MAX

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type Simd = i64x8

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impl<const CS: bool> SimdElem<u32> for Avx512<CS>

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const L: usize = 16

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const MAX: u32 = u32::MAX

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type Simd = u32x16

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impl<const CS: bool> SimdElem<u64> for Avx512<CS>

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const L: usize = 8

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const MAX: u64 = u64::MAX

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type Simd = u64x8