Struct RCC_TypeDef 

#[repr(C)]
pub struct RCC_TypeDef {

    pub CR: u32,
    pub ICSCR: u32,
    pub CFGR: u32,
    pub PLLCFGR: u32,
    pub ECSCR: u32,
    pub RESERVED1: u32,
    pub CIER: u32,
    pub CIFR: u32,
    pub CICR: u32,
    pub IOPRSTR: u32,
    pub AHBRSTR: u32,
    pub APBRSTR1: u32,
    pub APBRSTR2: u32,
    pub IOPENR: u32,
    pub AHBENR: u32,
    pub APBENR1: u32,
    pub APBENR2: u32,
    pub RESERVED2: [u32; 4],
    pub CCIPR: u32,
    pub RESERVED3: u32,
    pub BDCR: u32,
    pub CSR: u32,
}

@brief Reset and Clock Control

Fields

CR: u32

< RCC Clock Sources Control Register, Address offset: 0x00

ICSCR: u32

< RCC Internal Clock Sources Calibration Register, Address offset: 0x04

CFGR: u32

< RCC Regulated Domain Clocks Configuration Register, Address offset: 0x08

PLLCFGR: u32

< RCC System PLL configuration Register, Address offset: 0x0C

ECSCR: u32

< RCC External clock source control register, Address offset: 0x10

RESERVED1: u32

< Reserved, Address offset: 0x14

CIER: u32

< RCC Clock Interrupt Enable Register, Address offset: 0x18

CIFR: u32

< RCC Clock Interrupt Flag Register, Address offset: 0x1C

CICR: u32

< RCC Clock Interrupt Clear Register, Address offset: 0x20

IOPRSTR: u32

< RCC IO port reset register, Address offset: 0x24

AHBRSTR: u32

< RCC AHB peripherals reset register, Address offset: 0x28

APBRSTR1: u32

< RCC APB peripherals reset register 1, Address offset: 0x2C

APBRSTR2: u32

< RCC APB peripherals reset register 2, Address offset: 0x30

IOPENR: u32

< RCC IO port enable register, Address offset: 0x34

AHBENR: u32

< RCC AHB peripherals clock enable register, Address offset: 0x38

APBENR1: u32

< RCC APB peripherals clock enable register1, Address offset: 0x3C

APBENR2: u32

< RCC APB peripherals clock enable register2, Address offset: 0x40

RESERVED2: [u32; 4]

< Reserved, Address offset: 0x44-0x50

CCIPR: u32

< RCC Peripherals Independent Clocks Configuration Register, Address offset: 0x54

RESERVED3: u32

< Reserved, Address offset: 0x58

BDCR: u32

< RCC Backup Domain Control Register, Address offset: 0x5C

CSR: u32

< RCC Unregulated Domain Clock Control and Status Register, Address offset: 0x60

Trait Implementations

impl Clone for RCC_TypeDef

fn clone(&self) -> RCC_TypeDef

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for RCC_TypeDef

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Copy for RCC_TypeDef