Expand description
Cranelift-SIMD compute kernels for element-wise vector math (type_system_alignment.md §8.2, execution level).
Four f32-lane kernels are compiled once per process through the
same cranelift JIT engine the scalar kernels use, with
enable_simd on. Each kernel processes the slice body in
F32X4 chunks (unaligned 128-bit loads — SliceArc<f32> data
is only 4-aligned) and finishes the remainder in a scalar loop:
dot_f32(a, b, len) -> f32— F32X4 multiply-accumulate, horizontal reduce, scalar tail.l2sq_f32(a, b, len) -> f32— squared-difference accumulate; callers take the square root.add_f32(a, b, out, len)— element-wise sum.scale_f32(a, k, out, len)— scalar broadcast multiply (splat).
Consumers are the vec_* library nodes in
crate::library::vector_math, which fall back to scalar Rust
loops when the JIT feature is off or ISA construction fails.
SIMD accumulation reassociates floating-point addition, so
results may differ from the scalar reference in the final
ulps; the equivalence tests compare with relative tolerance.
Structs§
- Simd
Kernels - Finalized SIMD kernel entry points. The owning
JITModuleis kept alive alongside the pointers (dropping it would unmap the code pages).
Functions§
- kernels
- The process-wide SIMD kernel set, compiled on first use.
Nonewhen the host ISA can’t be constructed with SIMD enabled — callers fall back to their scalar loops.