Struct RegisterBlock 

pub struct RegisterBlock { /* private fields */ }

Register block

Implementations

impl RegisterBlock

pub const fn chipid0(&self) -> &Reg<CHIPID0_SPEC>

0x00 - Bits 15:0 of public device ID. (ECC) The CHIPID0..3 rows contain a 64-bit random identifier for this chip, which can be read from the USB bootloader PICOBOOT interface or from the get_sys_info ROM API. The number of random bits makes the occurrence of twins exceedingly unlikely: for example, a fleet of a hundred million devices has a 99.97% probability of no twinned IDs. This is estimated to be lower than the occurrence of process errors in the assignment of sequential random IDs, and for practical purposes CHIPID may be treated as unique.

pub const fn chipid1(&self) -> &Reg<CHIPID1_SPEC>

0x04 - Bits 31:16 of public device ID (ECC)

pub const fn chipid2(&self) -> &Reg<CHIPID2_SPEC>

0x08 - Bits 47:32 of public device ID (ECC)

pub const fn chipid3(&self) -> &Reg<CHIPID3_SPEC>

0x0c - Bits 63:48 of public device ID (ECC)

pub const fn randid0(&self) -> &Reg<RANDID0_SPEC>

0x10 - Bits 15:0 of private per-device random number (ECC) The RANDID0..7 rows form a 128-bit random number generated during device test. This ID is not exposed through the USB PICOBOOT GET_INFO command or the ROM get_sys_info() API. However note that the USB PICOBOOT OTP access point can read the entirety of page 0, so this value is not meaningfully private unless the USB PICOBOOT interface is disabled via the DISABLE_BOOTSEL_USB_PICOBOOT_IFC flag in BOOT_FLAGS0.

pub const fn randid1(&self) -> &Reg<RANDID1_SPEC>

0x14 - Bits 31:16 of private per-device random number (ECC)

pub const fn randid2(&self) -> &Reg<RANDID2_SPEC>

0x18 - Bits 47:32 of private per-device random number (ECC)

pub const fn randid3(&self) -> &Reg<RANDID3_SPEC>

0x1c - Bits 63:48 of private per-device random number (ECC)

pub const fn randid4(&self) -> &Reg<RANDID4_SPEC>

0x20 - Bits 79:64 of private per-device random number (ECC)

pub const fn randid5(&self) -> &Reg<RANDID5_SPEC>

0x24 - Bits 95:80 of private per-device random number (ECC)

pub const fn randid6(&self) -> &Reg<RANDID6_SPEC>

0x28 - Bits 111:96 of private per-device random number (ECC)

pub const fn randid7(&self) -> &Reg<RANDID7_SPEC>

0x2c - Bits 127:112 of private per-device random number (ECC)

pub const fn rosc_calib(&self) -> &Reg<ROSC_CALIB_SPEC>

0x40 - Ring oscillator frequency in kHz, measured during manufacturing (ECC) This is measured at 1.1 V, at room temperature, with the ROSC configuration registers in their reset state.

pub const fn lposc_calib(&self) -> &Reg<LPOSC_CALIB_SPEC>

0x44 - Low-power oscillator frequency in Hz, measured during manufacturing (ECC) This is measured at 1.1V, at room temperature, with the LPOSC trim register in its reset state.

pub const fn num_gpios(&self) -> &Reg<NUM_GPIOS_SPEC>

0x60 - The number of main user GPIOs (bank 0). Should read 48 in the QFN80 package, and 30 in the QFN60 package. (ECC)

pub const fn info_crc0(&self) -> &Reg<INFO_CRC0_SPEC>

0xd8 - Lower 16 bits of CRC32 of OTP addresses 0x00 through 0x6b (polynomial 0x4c11db7, input reflected, output reflected, seed all-ones, final XOR all-ones) (ECC)

pub const fn info_crc1(&self) -> &Reg<INFO_CRC1_SPEC>

0xdc - Upper 16 bits of CRC32 of OTP addresses 0x00 through 0x6b (ECC)

pub const fn crit0(&self) -> &Reg<CRIT0_SPEC>

0xe0 - Page 0 critical boot flags (RBIT-8)

pub const fn crit0_r1(&self) -> &Reg<CRIT0_R1_SPEC>

0xe4 - Redundant copy of CRIT0

pub const fn crit0_r2(&self) -> &Reg<CRIT0_R2_SPEC>

0xe8 - Redundant copy of CRIT0

pub const fn crit0_r3(&self) -> &Reg<CRIT0_R3_SPEC>

0xec - Redundant copy of CRIT0

pub const fn crit0_r4(&self) -> &Reg<CRIT0_R4_SPEC>

0xf0 - Redundant copy of CRIT0

pub const fn crit0_r5(&self) -> &Reg<CRIT0_R5_SPEC>

0xf4 - Redundant copy of CRIT0

pub const fn crit0_r6(&self) -> &Reg<CRIT0_R6_SPEC>

0xf8 - Redundant copy of CRIT0

pub const fn crit0_r7(&self) -> &Reg<CRIT0_R7_SPEC>

0xfc - Redundant copy of CRIT0

pub const fn crit1(&self) -> &Reg<CRIT1_SPEC>

0x100 - Page 1 critical boot flags (RBIT-8)

pub const fn crit1_r1(&self) -> &Reg<CRIT1_R1_SPEC>

0x104 - Redundant copy of CRIT1

pub const fn crit1_r2(&self) -> &Reg<CRIT1_R2_SPEC>

0x108 - Redundant copy of CRIT1

pub const fn crit1_r3(&self) -> &Reg<CRIT1_R3_SPEC>

0x10c - Redundant copy of CRIT1

pub const fn crit1_r4(&self) -> &Reg<CRIT1_R4_SPEC>

0x110 - Redundant copy of CRIT1

pub const fn crit1_r5(&self) -> &Reg<CRIT1_R5_SPEC>

0x114 - Redundant copy of CRIT1

pub const fn crit1_r6(&self) -> &Reg<CRIT1_R6_SPEC>

0x118 - Redundant copy of CRIT1

pub const fn crit1_r7(&self) -> &Reg<CRIT1_R7_SPEC>

0x11c - Redundant copy of CRIT1

pub const fn boot_flags0(&self) -> &Reg<BOOT_FLAGS0_SPEC>

0x120 - Disable/Enable boot paths/features in the RP2350 mask ROM. Disables always supersede enables. Enables are provided where there are other configurations in OTP that must be valid. (RBIT-3)

pub const fn boot_flags0_r1(&self) -> &Reg<BOOT_FLAGS0_R1_SPEC>

0x124 - Redundant copy of BOOT_FLAGS0

pub const fn boot_flags0_r2(&self) -> &Reg<BOOT_FLAGS0_R2_SPEC>

0x128 - Redundant copy of BOOT_FLAGS0

pub const fn boot_flags1(&self) -> &Reg<BOOT_FLAGS1_SPEC>

0x12c - Disable/Enable boot paths/features in the RP2350 mask ROM. Disables always supersede enables. Enables are provided where there are other configurations in OTP that must be valid. (RBIT-3)

pub const fn boot_flags1_r1(&self) -> &Reg<BOOT_FLAGS1_R1_SPEC>

0x130 - Redundant copy of BOOT_FLAGS1

pub const fn boot_flags1_r2(&self) -> &Reg<BOOT_FLAGS1_R2_SPEC>

0x134 - Redundant copy of BOOT_FLAGS1

pub const fn default_boot_version0(&self) -> &Reg<DEFAULT_BOOT_VERSION0_SPEC>

0x138 - Default boot version thermometer counter, bits 23:0 (RBIT-3)

pub const fn default_boot_version0_r1( &self, ) -> &Reg<DEFAULT_BOOT_VERSION0_R1_SPEC>

0x13c - Redundant copy of DEFAULT_BOOT_VERSION0

pub const fn default_boot_version0_r2( &self, ) -> &Reg<DEFAULT_BOOT_VERSION0_R2_SPEC>

0x140 - Redundant copy of DEFAULT_BOOT_VERSION0

pub const fn default_boot_version1(&self) -> &Reg<DEFAULT_BOOT_VERSION1_SPEC>

0x144 - Default boot version thermometer counter, bits 47:24 (RBIT-3)

pub const fn default_boot_version1_r1( &self, ) -> &Reg<DEFAULT_BOOT_VERSION1_R1_SPEC>

0x148 - Redundant copy of DEFAULT_BOOT_VERSION1

pub const fn default_boot_version1_r2( &self, ) -> &Reg<DEFAULT_BOOT_VERSION1_R2_SPEC>

0x14c - Redundant copy of DEFAULT_BOOT_VERSION1

pub const fn flash_devinfo(&self) -> &Reg<FLASH_DEVINFO_SPEC>

0x150 - Stores information about external flash device(s). (ECC) Assumed to be valid if BOOT_FLAGS0_FLASH_DEVINFO_ENABLE is set.

pub const fn flash_partition_slot_size( &self, ) -> &Reg<FLASH_PARTITION_SLOT_SIZE_SPEC>

0x154 - Gap between partition table slot 0 and slot 1 at the start of flash (the default size is 4096 bytes) (ECC) Enabled by the OVERRIDE_FLASH_PARTITION_SLOT_SIZE bit in BOOT_FLAGS, the size is 4096 * (value + 1)

pub const fn bootsel_led_cfg(&self) -> &Reg<BOOTSEL_LED_CFG_SPEC>

0x158 - Pin configuration for LED status, used by USB bootloader. (ECC) Must be valid if BOOT_FLAGS0_ENABLE_BOOTSEL_LED is set.

pub const fn bootsel_pll_cfg(&self) -> &Reg<BOOTSEL_PLL_CFG_SPEC>

0x15c - Optional PLL configuration for BOOTSEL mode. (ECC) This should be configured to produce an exact 48 MHz based on the crystal oscillator frequency. User mode software may also use this value to calculate the expected crystal frequency based on an assumed 48 MHz PLL output. If no configuration is given, the crystal is assumed to be 12 MHz. The PLL frequency can be calculated as: PLL out = (XOSC frequency / (REFDIV+1)) x FBDIV / (POSTDIV1 x POSTDIV2) Conversely the crystal frequency can be calculated as: XOSC frequency = 48 MHz x (REFDIV+1) x (POSTDIV1 x POSTDIV2) / FBDIV (Note the +1 on REFDIV is because the value stored in this OTP location is the actual divisor value minus one.) Used if and only if ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG is set in BOOT_FLAGS0. That bit should be set only after this row and BOOTSEL_XOSC_CFG are both correctly programmed.

pub const fn bootsel_xosc_cfg(&self) -> &Reg<BOOTSEL_XOSC_CFG_SPEC>

0x160 - Non-default crystal oscillator configuration for the USB bootloader. (ECC) These values may also be used by user code configuring the crystal oscillator. Used if and only if ENABLE_BOOTSEL_NON_DEFAULT_PLL_XOSC_CFG is set in BOOT_FLAGS0. That bit should be set only after this row and BOOTSEL_PLL_CFG are both correctly programmed.

pub const fn usb_boot_flags(&self) -> &Reg<USB_BOOT_FLAGS_SPEC>

0x164 - USB boot specific feature flags (RBIT-3)

pub const fn usb_boot_flags_r1(&self) -> &Reg<USB_BOOT_FLAGS_R1_SPEC>

0x168 - Redundant copy of USB_BOOT_FLAGS

pub const fn usb_boot_flags_r2(&self) -> &Reg<USB_BOOT_FLAGS_R2_SPEC>

0x16c - Redundant copy of USB_BOOT_FLAGS

pub const fn usb_white_label_addr(&self) -> &Reg<USB_WHITE_LABEL_ADDR_SPEC>

0x170 - Row index of the USB_WHITE_LABEL structure within OTP (ECC) The table has 16 rows, each of which are also ECC and marked valid by the corresponding valid bit in USB_BOOT_FLAGS (ECC). The entries are either _VALUEs where the 16 bit value is used as is, or _STRDEFs which acts as a pointers to a string value. The value stored in a _STRDEF is two separate bytes: The low seven bits of the first (LSB) byte indicates the number of characters in the string, and the top bit of the first (LSB) byte if set to indicate that each character in the string is two bytes (Unicode) versus one byte if unset. The second (MSB) byte represents the location of the string data, and is encoded as the number of rows from this USB_WHITE_LABEL_ADDR; i.e. the row of the start of the string is USB_WHITE_LABEL_ADDR value + msb_byte. In each case, the corresponding valid bit enables replacing the default value for the corresponding item provided by the boot rom. Note that Unicode _STRDEFs are only supported for USB_DEVICE_PRODUCT_STRDEF, USB_DEVICE_SERIAL_NUMBER_STRDEF and USB_DEVICE_MANUFACTURER_STRDEF. Unicode values will be ignored if specified for other fields, and non-unicode values for these three items will be converted to Unicode characters by setting the upper 8 bits to zero. Note that if the USB_WHITE_LABEL structure or the corresponding strings are not readable by BOOTSEL mode based on OTP permissions, or if alignment requirements are not met, then the corresponding default values are used. The index values indicate where each field is located (row USB_WHITE_LABEL_ADDR value + index):

pub const fn otpboot_src(&self) -> &Reg<OTPBOOT_SRC_SPEC>

0x178 - OTP start row for the OTP boot image. (ECC) If OTP boot is enabled, the bootrom will load from this location into SRAM and then directly enter the loaded image. Note that the image must be signed if SECURE_BOOT_ENABLE is set. The image itself is assumed to be ECC-protected. This must be an even number. Equivalently, the OTP boot image must start at a word-aligned location in the ECC read data address window.

pub const fn otpboot_len(&self) -> &Reg<OTPBOOT_LEN_SPEC>

0x17c - Length in rows of the OTP boot image. (ECC) OTPBOOT_LEN must be even. The total image size must be a multiple of 4 bytes (32 bits).

pub const fn otpboot_dst0(&self) -> &Reg<OTPBOOT_DST0_SPEC>

0x180 - Bits 15:0 of the OTP boot image load destination (and entry point). (ECC) This must be a location in main SRAM (main SRAM is addresses 0x20000000 through 0x20082000) and must be word-aligned.

pub const fn otpboot_dst1(&self) -> &Reg<OTPBOOT_DST1_SPEC>

0x184 - Bits 31:16 of the OTP boot image load destination (and entry point). (ECC) This must be a location in main SRAM (main SRAM is addresses 0x20000000 through 0x20082000) and must be word-aligned.

pub const fn bootkey0_0(&self) -> &Reg<BOOTKEY0_0_SPEC>

0x200 - Bits 15:0 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_1(&self) -> &Reg<BOOTKEY0_1_SPEC>

0x204 - Bits 31:16 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_2(&self) -> &Reg<BOOTKEY0_2_SPEC>

0x208 - Bits 47:32 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_3(&self) -> &Reg<BOOTKEY0_3_SPEC>

0x20c - Bits 63:48 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_4(&self) -> &Reg<BOOTKEY0_4_SPEC>

0x210 - Bits 79:64 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_5(&self) -> &Reg<BOOTKEY0_5_SPEC>

0x214 - Bits 95:80 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_6(&self) -> &Reg<BOOTKEY0_6_SPEC>

0x218 - Bits 111:96 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_7(&self) -> &Reg<BOOTKEY0_7_SPEC>

0x21c - Bits 127:112 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_8(&self) -> &Reg<BOOTKEY0_8_SPEC>

0x220 - Bits 143:128 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_9(&self) -> &Reg<BOOTKEY0_9_SPEC>

0x224 - Bits 159:144 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_10(&self) -> &Reg<BOOTKEY0_10_SPEC>

0x228 - Bits 175:160 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_11(&self) -> &Reg<BOOTKEY0_11_SPEC>

0x22c - Bits 191:176 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_12(&self) -> &Reg<BOOTKEY0_12_SPEC>

0x230 - Bits 207:192 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_13(&self) -> &Reg<BOOTKEY0_13_SPEC>

0x234 - Bits 223:208 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_14(&self) -> &Reg<BOOTKEY0_14_SPEC>

0x238 - Bits 239:224 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey0_15(&self) -> &Reg<BOOTKEY0_15_SPEC>

0x23c - Bits 255:240 of SHA-256 hash of boot key 0 (ECC)

pub const fn bootkey1_0(&self) -> &Reg<BOOTKEY1_0_SPEC>

0x240 - Bits 15:0 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_1(&self) -> &Reg<BOOTKEY1_1_SPEC>

0x244 - Bits 31:16 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_2(&self) -> &Reg<BOOTKEY1_2_SPEC>

0x248 - Bits 47:32 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_3(&self) -> &Reg<BOOTKEY1_3_SPEC>

0x24c - Bits 63:48 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_4(&self) -> &Reg<BOOTKEY1_4_SPEC>

0x250 - Bits 79:64 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_5(&self) -> &Reg<BOOTKEY1_5_SPEC>

0x254 - Bits 95:80 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_6(&self) -> &Reg<BOOTKEY1_6_SPEC>

0x258 - Bits 111:96 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_7(&self) -> &Reg<BOOTKEY1_7_SPEC>

0x25c - Bits 127:112 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_8(&self) -> &Reg<BOOTKEY1_8_SPEC>

0x260 - Bits 143:128 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_9(&self) -> &Reg<BOOTKEY1_9_SPEC>

0x264 - Bits 159:144 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_10(&self) -> &Reg<BOOTKEY1_10_SPEC>

0x268 - Bits 175:160 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_11(&self) -> &Reg<BOOTKEY1_11_SPEC>

0x26c - Bits 191:176 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_12(&self) -> &Reg<BOOTKEY1_12_SPEC>

0x270 - Bits 207:192 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_13(&self) -> &Reg<BOOTKEY1_13_SPEC>

0x274 - Bits 223:208 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_14(&self) -> &Reg<BOOTKEY1_14_SPEC>

0x278 - Bits 239:224 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey1_15(&self) -> &Reg<BOOTKEY1_15_SPEC>

0x27c - Bits 255:240 of SHA-256 hash of boot key 1 (ECC)

pub const fn bootkey2_0(&self) -> &Reg<BOOTKEY2_0_SPEC>

0x280 - Bits 15:0 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_1(&self) -> &Reg<BOOTKEY2_1_SPEC>

0x284 - Bits 31:16 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_2(&self) -> &Reg<BOOTKEY2_2_SPEC>

0x288 - Bits 47:32 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_3(&self) -> &Reg<BOOTKEY2_3_SPEC>

0x28c - Bits 63:48 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_4(&self) -> &Reg<BOOTKEY2_4_SPEC>

0x290 - Bits 79:64 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_5(&self) -> &Reg<BOOTKEY2_5_SPEC>

0x294 - Bits 95:80 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_6(&self) -> &Reg<BOOTKEY2_6_SPEC>

0x298 - Bits 111:96 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_7(&self) -> &Reg<BOOTKEY2_7_SPEC>

0x29c - Bits 127:112 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_8(&self) -> &Reg<BOOTKEY2_8_SPEC>

0x2a0 - Bits 143:128 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_9(&self) -> &Reg<BOOTKEY2_9_SPEC>

0x2a4 - Bits 159:144 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_10(&self) -> &Reg<BOOTKEY2_10_SPEC>

0x2a8 - Bits 175:160 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_11(&self) -> &Reg<BOOTKEY2_11_SPEC>

0x2ac - Bits 191:176 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_12(&self) -> &Reg<BOOTKEY2_12_SPEC>

0x2b0 - Bits 207:192 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_13(&self) -> &Reg<BOOTKEY2_13_SPEC>

0x2b4 - Bits 223:208 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_14(&self) -> &Reg<BOOTKEY2_14_SPEC>

0x2b8 - Bits 239:224 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey2_15(&self) -> &Reg<BOOTKEY2_15_SPEC>

0x2bc - Bits 255:240 of SHA-256 hash of boot key 2 (ECC)

pub const fn bootkey3_0(&self) -> &Reg<BOOTKEY3_0_SPEC>

0x2c0 - Bits 15:0 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_1(&self) -> &Reg<BOOTKEY3_1_SPEC>

0x2c4 - Bits 31:16 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_2(&self) -> &Reg<BOOTKEY3_2_SPEC>

0x2c8 - Bits 47:32 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_3(&self) -> &Reg<BOOTKEY3_3_SPEC>

0x2cc - Bits 63:48 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_4(&self) -> &Reg<BOOTKEY3_4_SPEC>

0x2d0 - Bits 79:64 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_5(&self) -> &Reg<BOOTKEY3_5_SPEC>

0x2d4 - Bits 95:80 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_6(&self) -> &Reg<BOOTKEY3_6_SPEC>

0x2d8 - Bits 111:96 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_7(&self) -> &Reg<BOOTKEY3_7_SPEC>

0x2dc - Bits 127:112 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_8(&self) -> &Reg<BOOTKEY3_8_SPEC>

0x2e0 - Bits 143:128 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_9(&self) -> &Reg<BOOTKEY3_9_SPEC>

0x2e4 - Bits 159:144 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_10(&self) -> &Reg<BOOTKEY3_10_SPEC>

0x2e8 - Bits 175:160 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_11(&self) -> &Reg<BOOTKEY3_11_SPEC>

0x2ec - Bits 191:176 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_12(&self) -> &Reg<BOOTKEY3_12_SPEC>

0x2f0 - Bits 207:192 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_13(&self) -> &Reg<BOOTKEY3_13_SPEC>

0x2f4 - Bits 223:208 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_14(&self) -> &Reg<BOOTKEY3_14_SPEC>

0x2f8 - Bits 239:224 of SHA-256 hash of boot key 3 (ECC)

pub const fn bootkey3_15(&self) -> &Reg<BOOTKEY3_15_SPEC>

0x2fc - Bits 255:240 of SHA-256 hash of boot key 3 (ECC)

pub const fn key1_0(&self) -> &Reg<KEY1_0_SPEC>

0x3d20 - Bits 15:0 of OTP access key 1 (ECC)

pub const fn key1_1(&self) -> &Reg<KEY1_1_SPEC>

0x3d24 - Bits 31:16 of OTP access key 1 (ECC)

pub const fn key1_2(&self) -> &Reg<KEY1_2_SPEC>

0x3d28 - Bits 47:32 of OTP access key 1 (ECC)

pub const fn key1_3(&self) -> &Reg<KEY1_3_SPEC>

0x3d2c - Bits 63:48 of OTP access key 1 (ECC)

pub const fn key1_4(&self) -> &Reg<KEY1_4_SPEC>

0x3d30 - Bits 79:64 of OTP access key 1 (ECC)

pub const fn key1_5(&self) -> &Reg<KEY1_5_SPEC>

0x3d34 - Bits 95:80 of OTP access key 1 (ECC)

pub const fn key1_6(&self) -> &Reg<KEY1_6_SPEC>

0x3d38 - Bits 111:96 of OTP access key 1 (ECC)

pub const fn key1_7(&self) -> &Reg<KEY1_7_SPEC>

0x3d3c - Bits 127:112 of OTP access key 1 (ECC)

pub const fn key2_0(&self) -> &Reg<KEY2_0_SPEC>

0x3d40 - Bits 15:0 of OTP access key 2 (ECC)

pub const fn key2_1(&self) -> &Reg<KEY2_1_SPEC>

0x3d44 - Bits 31:16 of OTP access key 2 (ECC)

pub const fn key2_2(&self) -> &Reg<KEY2_2_SPEC>

0x3d48 - Bits 47:32 of OTP access key 2 (ECC)

pub const fn key2_3(&self) -> &Reg<KEY2_3_SPEC>

0x3d4c - Bits 63:48 of OTP access key 2 (ECC)

pub const fn key2_4(&self) -> &Reg<KEY2_4_SPEC>

0x3d50 - Bits 79:64 of OTP access key 2 (ECC)

pub const fn key2_5(&self) -> &Reg<KEY2_5_SPEC>

0x3d54 - Bits 95:80 of OTP access key 2 (ECC)

pub const fn key2_6(&self) -> &Reg<KEY2_6_SPEC>

0x3d58 - Bits 111:96 of OTP access key 2 (ECC)

pub const fn key2_7(&self) -> &Reg<KEY2_7_SPEC>

0x3d5c - Bits 127:112 of OTP access key 2 (ECC)

pub const fn key3_0(&self) -> &Reg<KEY3_0_SPEC>

0x3d60 - Bits 15:0 of OTP access key 3 (ECC)

pub const fn key3_1(&self) -> &Reg<KEY3_1_SPEC>

0x3d64 - Bits 31:16 of OTP access key 3 (ECC)

pub const fn key3_2(&self) -> &Reg<KEY3_2_SPEC>

0x3d68 - Bits 47:32 of OTP access key 3 (ECC)

pub const fn key3_3(&self) -> &Reg<KEY3_3_SPEC>

0x3d6c - Bits 63:48 of OTP access key 3 (ECC)

pub const fn key3_4(&self) -> &Reg<KEY3_4_SPEC>

0x3d70 - Bits 79:64 of OTP access key 3 (ECC)

pub const fn key3_5(&self) -> &Reg<KEY3_5_SPEC>

0x3d74 - Bits 95:80 of OTP access key 3 (ECC)

pub const fn key3_6(&self) -> &Reg<KEY3_6_SPEC>

0x3d78 - Bits 111:96 of OTP access key 3 (ECC)

pub const fn key3_7(&self) -> &Reg<KEY3_7_SPEC>

0x3d7c - Bits 127:112 of OTP access key 3 (ECC)

pub const fn key4_0(&self) -> &Reg<KEY4_0_SPEC>

0x3d80 - Bits 15:0 of OTP access key 4 (ECC)

pub const fn key4_1(&self) -> &Reg<KEY4_1_SPEC>

0x3d84 - Bits 31:16 of OTP access key 4 (ECC)

pub const fn key4_2(&self) -> &Reg<KEY4_2_SPEC>

0x3d88 - Bits 47:32 of OTP access key 4 (ECC)

pub const fn key4_3(&self) -> &Reg<KEY4_3_SPEC>

0x3d8c - Bits 63:48 of OTP access key 4 (ECC)

pub const fn key4_4(&self) -> &Reg<KEY4_4_SPEC>

0x3d90 - Bits 79:64 of OTP access key 4 (ECC)

pub const fn key4_5(&self) -> &Reg<KEY4_5_SPEC>

0x3d94 - Bits 95:80 of OTP access key 4 (ECC)

pub const fn key4_6(&self) -> &Reg<KEY4_6_SPEC>

0x3d98 - Bits 111:96 of OTP access key 4 (ECC)

pub const fn key4_7(&self) -> &Reg<KEY4_7_SPEC>

0x3d9c - Bits 127:112 of OTP access key 4 (ECC)

pub const fn key5_0(&self) -> &Reg<KEY5_0_SPEC>

0x3da0 - Bits 15:0 of OTP access key 5 (ECC)

pub const fn key5_1(&self) -> &Reg<KEY5_1_SPEC>

0x3da4 - Bits 31:16 of OTP access key 5 (ECC)

pub const fn key5_2(&self) -> &Reg<KEY5_2_SPEC>

0x3da8 - Bits 47:32 of OTP access key 5 (ECC)

pub const fn key5_3(&self) -> &Reg<KEY5_3_SPEC>

0x3dac - Bits 63:48 of OTP access key 5 (ECC)

pub const fn key5_4(&self) -> &Reg<KEY5_4_SPEC>

0x3db0 - Bits 79:64 of OTP access key 5 (ECC)

pub const fn key5_5(&self) -> &Reg<KEY5_5_SPEC>

0x3db4 - Bits 95:80 of OTP access key 5 (ECC)

pub const fn key5_6(&self) -> &Reg<KEY5_6_SPEC>

0x3db8 - Bits 111:96 of OTP access key 5 (ECC)

pub const fn key5_7(&self) -> &Reg<KEY5_7_SPEC>

0x3dbc - Bits 127:112 of OTP access key 5 (ECC)

pub const fn key6_0(&self) -> &Reg<KEY6_0_SPEC>

0x3dc0 - Bits 15:0 of OTP access key 6 (ECC)

pub const fn key6_1(&self) -> &Reg<KEY6_1_SPEC>

0x3dc4 - Bits 31:16 of OTP access key 6 (ECC)

pub const fn key6_2(&self) -> &Reg<KEY6_2_SPEC>

0x3dc8 - Bits 47:32 of OTP access key 6 (ECC)

pub const fn key6_3(&self) -> &Reg<KEY6_3_SPEC>

0x3dcc - Bits 63:48 of OTP access key 6 (ECC)

pub const fn key6_4(&self) -> &Reg<KEY6_4_SPEC>

0x3dd0 - Bits 79:64 of OTP access key 6 (ECC)

pub const fn key6_5(&self) -> &Reg<KEY6_5_SPEC>

0x3dd4 - Bits 95:80 of OTP access key 6 (ECC)

pub const fn key6_6(&self) -> &Reg<KEY6_6_SPEC>

0x3dd8 - Bits 111:96 of OTP access key 6 (ECC)

pub const fn key6_7(&self) -> &Reg<KEY6_7_SPEC>

0x3ddc - Bits 127:112 of OTP access key 6 (ECC)

pub const fn key1_valid(&self) -> &Reg<KEY1_VALID_SPEC>

0x3de4 - Valid flag for key 1. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.

pub const fn key2_valid(&self) -> &Reg<KEY2_VALID_SPEC>

0x3de8 - Valid flag for key 2. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.

pub const fn key3_valid(&self) -> &Reg<KEY3_VALID_SPEC>

0x3dec - Valid flag for key 3. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.

pub const fn key4_valid(&self) -> &Reg<KEY4_VALID_SPEC>

0x3df0 - Valid flag for key 4. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.

pub const fn key5_valid(&self) -> &Reg<KEY5_VALID_SPEC>

0x3df4 - Valid flag for key 5. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.

pub const fn key6_valid(&self) -> &Reg<KEY6_VALID_SPEC>

0x3df8 - Valid flag for key 6. Once the valid flag is set, the key can no longer be read or written, and becomes a valid fixed key for protecting OTP pages.

pub const fn page0_lock0(&self) -> &Reg<PAGE0_LOCK0_SPEC>

0x3e00 - Lock configuration LSBs for page 0 (rows 0x0 through 0x3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page0_lock1(&self) -> &Reg<PAGE0_LOCK1_SPEC>

0x3e04 - Lock configuration MSBs for page 0 (rows 0x0 through 0x3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page1_lock0(&self) -> &Reg<PAGE1_LOCK0_SPEC>

0x3e08 - Lock configuration LSBs for page 1 (rows 0x40 through 0x7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page1_lock1(&self) -> &Reg<PAGE1_LOCK1_SPEC>

0x3e0c - Lock configuration MSBs for page 1 (rows 0x40 through 0x7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page2_lock0(&self) -> &Reg<PAGE2_LOCK0_SPEC>

0x3e10 - Lock configuration LSBs for page 2 (rows 0x80 through 0xbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page2_lock1(&self) -> &Reg<PAGE2_LOCK1_SPEC>

0x3e14 - Lock configuration MSBs for page 2 (rows 0x80 through 0xbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page3_lock0(&self) -> &Reg<PAGE3_LOCK0_SPEC>

0x3e18 - Lock configuration LSBs for page 3 (rows 0xc0 through 0xff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page3_lock1(&self) -> &Reg<PAGE3_LOCK1_SPEC>

0x3e1c - Lock configuration MSBs for page 3 (rows 0xc0 through 0xff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page4_lock0(&self) -> &Reg<PAGE4_LOCK0_SPEC>

0x3e20 - Lock configuration LSBs for page 4 (rows 0x100 through 0x13f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page4_lock1(&self) -> &Reg<PAGE4_LOCK1_SPEC>

0x3e24 - Lock configuration MSBs for page 4 (rows 0x100 through 0x13f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page5_lock0(&self) -> &Reg<PAGE5_LOCK0_SPEC>

0x3e28 - Lock configuration LSBs for page 5 (rows 0x140 through 0x17f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page5_lock1(&self) -> &Reg<PAGE5_LOCK1_SPEC>

0x3e2c - Lock configuration MSBs for page 5 (rows 0x140 through 0x17f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page6_lock0(&self) -> &Reg<PAGE6_LOCK0_SPEC>

0x3e30 - Lock configuration LSBs for page 6 (rows 0x180 through 0x1bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page6_lock1(&self) -> &Reg<PAGE6_LOCK1_SPEC>

0x3e34 - Lock configuration MSBs for page 6 (rows 0x180 through 0x1bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page7_lock0(&self) -> &Reg<PAGE7_LOCK0_SPEC>

0x3e38 - Lock configuration LSBs for page 7 (rows 0x1c0 through 0x1ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page7_lock1(&self) -> &Reg<PAGE7_LOCK1_SPEC>

0x3e3c - Lock configuration MSBs for page 7 (rows 0x1c0 through 0x1ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page8_lock0(&self) -> &Reg<PAGE8_LOCK0_SPEC>

0x3e40 - Lock configuration LSBs for page 8 (rows 0x200 through 0x23f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page8_lock1(&self) -> &Reg<PAGE8_LOCK1_SPEC>

0x3e44 - Lock configuration MSBs for page 8 (rows 0x200 through 0x23f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page9_lock0(&self) -> &Reg<PAGE9_LOCK0_SPEC>

0x3e48 - Lock configuration LSBs for page 9 (rows 0x240 through 0x27f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page9_lock1(&self) -> &Reg<PAGE9_LOCK1_SPEC>

0x3e4c - Lock configuration MSBs for page 9 (rows 0x240 through 0x27f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page10_lock0(&self) -> &Reg<PAGE10_LOCK0_SPEC>

0x3e50 - Lock configuration LSBs for page 10 (rows 0x280 through 0x2bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page10_lock1(&self) -> &Reg<PAGE10_LOCK1_SPEC>

0x3e54 - Lock configuration MSBs for page 10 (rows 0x280 through 0x2bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page11_lock0(&self) -> &Reg<PAGE11_LOCK0_SPEC>

0x3e58 - Lock configuration LSBs for page 11 (rows 0x2c0 through 0x2ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page11_lock1(&self) -> &Reg<PAGE11_LOCK1_SPEC>

0x3e5c - Lock configuration MSBs for page 11 (rows 0x2c0 through 0x2ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page12_lock0(&self) -> &Reg<PAGE12_LOCK0_SPEC>

0x3e60 - Lock configuration LSBs for page 12 (rows 0x300 through 0x33f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page12_lock1(&self) -> &Reg<PAGE12_LOCK1_SPEC>

0x3e64 - Lock configuration MSBs for page 12 (rows 0x300 through 0x33f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page13_lock0(&self) -> &Reg<PAGE13_LOCK0_SPEC>

0x3e68 - Lock configuration LSBs for page 13 (rows 0x340 through 0x37f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page13_lock1(&self) -> &Reg<PAGE13_LOCK1_SPEC>

0x3e6c - Lock configuration MSBs for page 13 (rows 0x340 through 0x37f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page14_lock0(&self) -> &Reg<PAGE14_LOCK0_SPEC>

0x3e70 - Lock configuration LSBs for page 14 (rows 0x380 through 0x3bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page14_lock1(&self) -> &Reg<PAGE14_LOCK1_SPEC>

0x3e74 - Lock configuration MSBs for page 14 (rows 0x380 through 0x3bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page15_lock0(&self) -> &Reg<PAGE15_LOCK0_SPEC>

0x3e78 - Lock configuration LSBs for page 15 (rows 0x3c0 through 0x3ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page15_lock1(&self) -> &Reg<PAGE15_LOCK1_SPEC>

0x3e7c - Lock configuration MSBs for page 15 (rows 0x3c0 through 0x3ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page16_lock0(&self) -> &Reg<PAGE16_LOCK0_SPEC>

0x3e80 - Lock configuration LSBs for page 16 (rows 0x400 through 0x43f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page16_lock1(&self) -> &Reg<PAGE16_LOCK1_SPEC>

0x3e84 - Lock configuration MSBs for page 16 (rows 0x400 through 0x43f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page17_lock0(&self) -> &Reg<PAGE17_LOCK0_SPEC>

0x3e88 - Lock configuration LSBs for page 17 (rows 0x440 through 0x47f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page17_lock1(&self) -> &Reg<PAGE17_LOCK1_SPEC>

0x3e8c - Lock configuration MSBs for page 17 (rows 0x440 through 0x47f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page18_lock0(&self) -> &Reg<PAGE18_LOCK0_SPEC>

0x3e90 - Lock configuration LSBs for page 18 (rows 0x480 through 0x4bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page18_lock1(&self) -> &Reg<PAGE18_LOCK1_SPEC>

0x3e94 - Lock configuration MSBs for page 18 (rows 0x480 through 0x4bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page19_lock0(&self) -> &Reg<PAGE19_LOCK0_SPEC>

0x3e98 - Lock configuration LSBs for page 19 (rows 0x4c0 through 0x4ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page19_lock1(&self) -> &Reg<PAGE19_LOCK1_SPEC>

0x3e9c - Lock configuration MSBs for page 19 (rows 0x4c0 through 0x4ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page20_lock0(&self) -> &Reg<PAGE20_LOCK0_SPEC>

0x3ea0 - Lock configuration LSBs for page 20 (rows 0x500 through 0x53f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page20_lock1(&self) -> &Reg<PAGE20_LOCK1_SPEC>

0x3ea4 - Lock configuration MSBs for page 20 (rows 0x500 through 0x53f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page21_lock0(&self) -> &Reg<PAGE21_LOCK0_SPEC>

0x3ea8 - Lock configuration LSBs for page 21 (rows 0x540 through 0x57f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page21_lock1(&self) -> &Reg<PAGE21_LOCK1_SPEC>

0x3eac - Lock configuration MSBs for page 21 (rows 0x540 through 0x57f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page22_lock0(&self) -> &Reg<PAGE22_LOCK0_SPEC>

0x3eb0 - Lock configuration LSBs for page 22 (rows 0x580 through 0x5bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page22_lock1(&self) -> &Reg<PAGE22_LOCK1_SPEC>

0x3eb4 - Lock configuration MSBs for page 22 (rows 0x580 through 0x5bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page23_lock0(&self) -> &Reg<PAGE23_LOCK0_SPEC>

0x3eb8 - Lock configuration LSBs for page 23 (rows 0x5c0 through 0x5ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page23_lock1(&self) -> &Reg<PAGE23_LOCK1_SPEC>

0x3ebc - Lock configuration MSBs for page 23 (rows 0x5c0 through 0x5ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page24_lock0(&self) -> &Reg<PAGE24_LOCK0_SPEC>

0x3ec0 - Lock configuration LSBs for page 24 (rows 0x600 through 0x63f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page24_lock1(&self) -> &Reg<PAGE24_LOCK1_SPEC>

0x3ec4 - Lock configuration MSBs for page 24 (rows 0x600 through 0x63f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page25_lock0(&self) -> &Reg<PAGE25_LOCK0_SPEC>

0x3ec8 - Lock configuration LSBs for page 25 (rows 0x640 through 0x67f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page25_lock1(&self) -> &Reg<PAGE25_LOCK1_SPEC>

0x3ecc - Lock configuration MSBs for page 25 (rows 0x640 through 0x67f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page26_lock0(&self) -> &Reg<PAGE26_LOCK0_SPEC>

0x3ed0 - Lock configuration LSBs for page 26 (rows 0x680 through 0x6bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page26_lock1(&self) -> &Reg<PAGE26_LOCK1_SPEC>

0x3ed4 - Lock configuration MSBs for page 26 (rows 0x680 through 0x6bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page27_lock0(&self) -> &Reg<PAGE27_LOCK0_SPEC>

0x3ed8 - Lock configuration LSBs for page 27 (rows 0x6c0 through 0x6ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page27_lock1(&self) -> &Reg<PAGE27_LOCK1_SPEC>

0x3edc - Lock configuration MSBs for page 27 (rows 0x6c0 through 0x6ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page28_lock0(&self) -> &Reg<PAGE28_LOCK0_SPEC>

0x3ee0 - Lock configuration LSBs for page 28 (rows 0x700 through 0x73f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page28_lock1(&self) -> &Reg<PAGE28_LOCK1_SPEC>

0x3ee4 - Lock configuration MSBs for page 28 (rows 0x700 through 0x73f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page29_lock0(&self) -> &Reg<PAGE29_LOCK0_SPEC>

0x3ee8 - Lock configuration LSBs for page 29 (rows 0x740 through 0x77f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page29_lock1(&self) -> &Reg<PAGE29_LOCK1_SPEC>

0x3eec - Lock configuration MSBs for page 29 (rows 0x740 through 0x77f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page30_lock0(&self) -> &Reg<PAGE30_LOCK0_SPEC>

0x3ef0 - Lock configuration LSBs for page 30 (rows 0x780 through 0x7bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page30_lock1(&self) -> &Reg<PAGE30_LOCK1_SPEC>

0x3ef4 - Lock configuration MSBs for page 30 (rows 0x780 through 0x7bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page31_lock0(&self) -> &Reg<PAGE31_LOCK0_SPEC>

0x3ef8 - Lock configuration LSBs for page 31 (rows 0x7c0 through 0x7ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page31_lock1(&self) -> &Reg<PAGE31_LOCK1_SPEC>

0x3efc - Lock configuration MSBs for page 31 (rows 0x7c0 through 0x7ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page32_lock0(&self) -> &Reg<PAGE32_LOCK0_SPEC>

0x3f00 - Lock configuration LSBs for page 32 (rows 0x800 through 0x83f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page32_lock1(&self) -> &Reg<PAGE32_LOCK1_SPEC>

0x3f04 - Lock configuration MSBs for page 32 (rows 0x800 through 0x83f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page33_lock0(&self) -> &Reg<PAGE33_LOCK0_SPEC>

0x3f08 - Lock configuration LSBs for page 33 (rows 0x840 through 0x87f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page33_lock1(&self) -> &Reg<PAGE33_LOCK1_SPEC>

0x3f0c - Lock configuration MSBs for page 33 (rows 0x840 through 0x87f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page34_lock0(&self) -> &Reg<PAGE34_LOCK0_SPEC>

0x3f10 - Lock configuration LSBs for page 34 (rows 0x880 through 0x8bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page34_lock1(&self) -> &Reg<PAGE34_LOCK1_SPEC>

0x3f14 - Lock configuration MSBs for page 34 (rows 0x880 through 0x8bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page35_lock0(&self) -> &Reg<PAGE35_LOCK0_SPEC>

0x3f18 - Lock configuration LSBs for page 35 (rows 0x8c0 through 0x8ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page35_lock1(&self) -> &Reg<PAGE35_LOCK1_SPEC>

0x3f1c - Lock configuration MSBs for page 35 (rows 0x8c0 through 0x8ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page36_lock0(&self) -> &Reg<PAGE36_LOCK0_SPEC>

0x3f20 - Lock configuration LSBs for page 36 (rows 0x900 through 0x93f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page36_lock1(&self) -> &Reg<PAGE36_LOCK1_SPEC>

0x3f24 - Lock configuration MSBs for page 36 (rows 0x900 through 0x93f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page37_lock0(&self) -> &Reg<PAGE37_LOCK0_SPEC>

0x3f28 - Lock configuration LSBs for page 37 (rows 0x940 through 0x97f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page37_lock1(&self) -> &Reg<PAGE37_LOCK1_SPEC>

0x3f2c - Lock configuration MSBs for page 37 (rows 0x940 through 0x97f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page38_lock0(&self) -> &Reg<PAGE38_LOCK0_SPEC>

0x3f30 - Lock configuration LSBs for page 38 (rows 0x980 through 0x9bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page38_lock1(&self) -> &Reg<PAGE38_LOCK1_SPEC>

0x3f34 - Lock configuration MSBs for page 38 (rows 0x980 through 0x9bf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page39_lock0(&self) -> &Reg<PAGE39_LOCK0_SPEC>

0x3f38 - Lock configuration LSBs for page 39 (rows 0x9c0 through 0x9ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page39_lock1(&self) -> &Reg<PAGE39_LOCK1_SPEC>

0x3f3c - Lock configuration MSBs for page 39 (rows 0x9c0 through 0x9ff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page40_lock0(&self) -> &Reg<PAGE40_LOCK0_SPEC>

0x3f40 - Lock configuration LSBs for page 40 (rows 0xa00 through 0xa3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page40_lock1(&self) -> &Reg<PAGE40_LOCK1_SPEC>

0x3f44 - Lock configuration MSBs for page 40 (rows 0xa00 through 0xa3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page41_lock0(&self) -> &Reg<PAGE41_LOCK0_SPEC>

0x3f48 - Lock configuration LSBs for page 41 (rows 0xa40 through 0xa7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page41_lock1(&self) -> &Reg<PAGE41_LOCK1_SPEC>

0x3f4c - Lock configuration MSBs for page 41 (rows 0xa40 through 0xa7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page42_lock0(&self) -> &Reg<PAGE42_LOCK0_SPEC>

0x3f50 - Lock configuration LSBs for page 42 (rows 0xa80 through 0xabf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page42_lock1(&self) -> &Reg<PAGE42_LOCK1_SPEC>

0x3f54 - Lock configuration MSBs for page 42 (rows 0xa80 through 0xabf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page43_lock0(&self) -> &Reg<PAGE43_LOCK0_SPEC>

0x3f58 - Lock configuration LSBs for page 43 (rows 0xac0 through 0xaff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page43_lock1(&self) -> &Reg<PAGE43_LOCK1_SPEC>

0x3f5c - Lock configuration MSBs for page 43 (rows 0xac0 through 0xaff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page44_lock0(&self) -> &Reg<PAGE44_LOCK0_SPEC>

0x3f60 - Lock configuration LSBs for page 44 (rows 0xb00 through 0xb3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page44_lock1(&self) -> &Reg<PAGE44_LOCK1_SPEC>

0x3f64 - Lock configuration MSBs for page 44 (rows 0xb00 through 0xb3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page45_lock0(&self) -> &Reg<PAGE45_LOCK0_SPEC>

0x3f68 - Lock configuration LSBs for page 45 (rows 0xb40 through 0xb7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page45_lock1(&self) -> &Reg<PAGE45_LOCK1_SPEC>

0x3f6c - Lock configuration MSBs for page 45 (rows 0xb40 through 0xb7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page46_lock0(&self) -> &Reg<PAGE46_LOCK0_SPEC>

0x3f70 - Lock configuration LSBs for page 46 (rows 0xb80 through 0xbbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page46_lock1(&self) -> &Reg<PAGE46_LOCK1_SPEC>

0x3f74 - Lock configuration MSBs for page 46 (rows 0xb80 through 0xbbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page47_lock0(&self) -> &Reg<PAGE47_LOCK0_SPEC>

0x3f78 - Lock configuration LSBs for page 47 (rows 0xbc0 through 0xbff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page47_lock1(&self) -> &Reg<PAGE47_LOCK1_SPEC>

0x3f7c - Lock configuration MSBs for page 47 (rows 0xbc0 through 0xbff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page48_lock0(&self) -> &Reg<PAGE48_LOCK0_SPEC>

0x3f80 - Lock configuration LSBs for page 48 (rows 0xc00 through 0xc3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page48_lock1(&self) -> &Reg<PAGE48_LOCK1_SPEC>

0x3f84 - Lock configuration MSBs for page 48 (rows 0xc00 through 0xc3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page49_lock0(&self) -> &Reg<PAGE49_LOCK0_SPEC>

0x3f88 - Lock configuration LSBs for page 49 (rows 0xc40 through 0xc7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page49_lock1(&self) -> &Reg<PAGE49_LOCK1_SPEC>

0x3f8c - Lock configuration MSBs for page 49 (rows 0xc40 through 0xc7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page50_lock0(&self) -> &Reg<PAGE50_LOCK0_SPEC>

0x3f90 - Lock configuration LSBs for page 50 (rows 0xc80 through 0xcbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page50_lock1(&self) -> &Reg<PAGE50_LOCK1_SPEC>

0x3f94 - Lock configuration MSBs for page 50 (rows 0xc80 through 0xcbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page51_lock0(&self) -> &Reg<PAGE51_LOCK0_SPEC>

0x3f98 - Lock configuration LSBs for page 51 (rows 0xcc0 through 0xcff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page51_lock1(&self) -> &Reg<PAGE51_LOCK1_SPEC>

0x3f9c - Lock configuration MSBs for page 51 (rows 0xcc0 through 0xcff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page52_lock0(&self) -> &Reg<PAGE52_LOCK0_SPEC>

0x3fa0 - Lock configuration LSBs for page 52 (rows 0xd00 through 0xd3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page52_lock1(&self) -> &Reg<PAGE52_LOCK1_SPEC>

0x3fa4 - Lock configuration MSBs for page 52 (rows 0xd00 through 0xd3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page53_lock0(&self) -> &Reg<PAGE53_LOCK0_SPEC>

0x3fa8 - Lock configuration LSBs for page 53 (rows 0xd40 through 0xd7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page53_lock1(&self) -> &Reg<PAGE53_LOCK1_SPEC>

0x3fac - Lock configuration MSBs for page 53 (rows 0xd40 through 0xd7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page54_lock0(&self) -> &Reg<PAGE54_LOCK0_SPEC>

0x3fb0 - Lock configuration LSBs for page 54 (rows 0xd80 through 0xdbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page54_lock1(&self) -> &Reg<PAGE54_LOCK1_SPEC>

0x3fb4 - Lock configuration MSBs for page 54 (rows 0xd80 through 0xdbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page55_lock0(&self) -> &Reg<PAGE55_LOCK0_SPEC>

0x3fb8 - Lock configuration LSBs for page 55 (rows 0xdc0 through 0xdff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page55_lock1(&self) -> &Reg<PAGE55_LOCK1_SPEC>

0x3fbc - Lock configuration MSBs for page 55 (rows 0xdc0 through 0xdff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page56_lock0(&self) -> &Reg<PAGE56_LOCK0_SPEC>

0x3fc0 - Lock configuration LSBs for page 56 (rows 0xe00 through 0xe3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page56_lock1(&self) -> &Reg<PAGE56_LOCK1_SPEC>

0x3fc4 - Lock configuration MSBs for page 56 (rows 0xe00 through 0xe3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page57_lock0(&self) -> &Reg<PAGE57_LOCK0_SPEC>

0x3fc8 - Lock configuration LSBs for page 57 (rows 0xe40 through 0xe7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page57_lock1(&self) -> &Reg<PAGE57_LOCK1_SPEC>

0x3fcc - Lock configuration MSBs for page 57 (rows 0xe40 through 0xe7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page58_lock0(&self) -> &Reg<PAGE58_LOCK0_SPEC>

0x3fd0 - Lock configuration LSBs for page 58 (rows 0xe80 through 0xebf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page58_lock1(&self) -> &Reg<PAGE58_LOCK1_SPEC>

0x3fd4 - Lock configuration MSBs for page 58 (rows 0xe80 through 0xebf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page59_lock0(&self) -> &Reg<PAGE59_LOCK0_SPEC>

0x3fd8 - Lock configuration LSBs for page 59 (rows 0xec0 through 0xeff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page59_lock1(&self) -> &Reg<PAGE59_LOCK1_SPEC>

0x3fdc - Lock configuration MSBs for page 59 (rows 0xec0 through 0xeff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page60_lock0(&self) -> &Reg<PAGE60_LOCK0_SPEC>

0x3fe0 - Lock configuration LSBs for page 60 (rows 0xf00 through 0xf3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page60_lock1(&self) -> &Reg<PAGE60_LOCK1_SPEC>

0x3fe4 - Lock configuration MSBs for page 60 (rows 0xf00 through 0xf3f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page61_lock0(&self) -> &Reg<PAGE61_LOCK0_SPEC>

0x3fe8 - Lock configuration LSBs for page 61 (rows 0xf40 through 0xf7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page61_lock1(&self) -> &Reg<PAGE61_LOCK1_SPEC>

0x3fec - Lock configuration MSBs for page 61 (rows 0xf40 through 0xf7f). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page62_lock0(&self) -> &Reg<PAGE62_LOCK0_SPEC>

0x3ff0 - Lock configuration LSBs for page 62 (rows 0xf80 through 0xfbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page62_lock1(&self) -> &Reg<PAGE62_LOCK1_SPEC>

0x3ff4 - Lock configuration MSBs for page 62 (rows 0xf80 through 0xfbf). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page63_lock0(&self) -> &Reg<PAGE63_LOCK0_SPEC>

0x3ff8 - Lock configuration LSBs for page 63 (rows 0xfc0 through 0xfff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.

pub const fn page63_lock1(&self) -> &Reg<PAGE63_LOCK1_SPEC>

0x3ffc - Lock configuration MSBs for page 63 (rows 0xfc0 through 0xfff). Locks are stored with 3-way majority vote encoding, so that bits can be set independently. This OTP location is always readable, and is write-protected by its own permissions.