Struct RegisterBlock 

pub struct RegisterBlock { /* private fields */ }

Register block

Implementations

impl RegisterBlock

pub const fn proc_config(&self) -> &Reg<PROC_CONFIG_SPEC>

0x00 - Configuration for processors

pub const fn proc_in_sync_bypass(&self) -> &Reg<PROC_IN_SYNC_BYPASS_SPEC>

0x04 - For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 0…31.

pub const fn proc_in_sync_bypass_hi(&self) -> &Reg<PROC_IN_SYNC_BYPASS_HI_SPEC>

0x08 - For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 32…47. USB GPIO 56..57 QSPI GPIO 58..63

pub const fn dbgforce(&self) -> &Reg<DBGFORCE_SPEC>

0x0c - Directly control the chip SWD debug port

pub const fn mempowerdown(&self) -> &Reg<MEMPOWERDOWN_SPEC>

0x10 - Control PD pins to memories. Set high to put memories to a low power state. In this state the memories will retain contents but not be accessible Use with caution

pub const fn auxctrl(&self) -> &Reg<AUXCTRL_SPEC>

0x14 - Auxiliary system control register