Struct RegisterBlock 

pub struct RegisterBlock { /* private fields */ }

Register block

Implementations

impl RegisterBlock

pub const fn addr_endp(&self) -> &Reg<ADDR_ENDP_SPEC>

0x00 - Device address and endpoint control

pub const fn host_addr_endp(&self, n: usize) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x04..0x40 - Interrupt endpoints. Only valid in HOST mode.

pub fn host_addr_endp_iter( &self, ) -> impl Iterator<Item = &Reg<HOST_ADDR_ENDP_SPEC>>

Iterator for array of: 0x04..0x40 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp1(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x04 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp2(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x08 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp3(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x0c - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp4(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x10 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp5(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x14 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp6(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x18 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp7(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x1c - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp8(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x20 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp9(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x24 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp10(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x28 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp11(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x2c - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp12(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x30 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp13(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x34 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp14(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x38 - Interrupt endpoints. Only valid in HOST mode.

pub const fn host_addr_endp15(&self) -> &Reg<HOST_ADDR_ENDP_SPEC>

0x3c - Interrupt endpoints. Only valid in HOST mode.

pub const fn main_ctrl(&self) -> &Reg<MAIN_CTRL_SPEC>

0x40 - Main control register

pub const fn sof_wr(&self) -> &Reg<SOF_WR_SPEC>

0x44 - Set the SOF (Start of Frame) frame number in the host controller. The SOF packet is sent every 1ms and the host will increment the frame number by 1 each time.

pub const fn sof_rd(&self) -> &Reg<SOF_RD_SPEC>

0x48 - Read the last SOF (Start of Frame) frame number seen. In device mode the last SOF received from the host. In host mode the last SOF sent by the host.

pub const fn sie_ctrl(&self) -> &Reg<SIE_CTRL_SPEC>

0x4c - SIE control register

pub const fn sie_status(&self) -> &Reg<SIE_STATUS_SPEC>

0x50 - SIE status register

pub const fn int_ep_ctrl(&self) -> &Reg<INT_EP_CTRL_SPEC>

0x54 - interrupt endpoint control register

pub const fn buff_status(&self) -> &Reg<BUFF_STATUS_SPEC>

0x58 - Buffer status register. A bit set here indicates that a buffer has completed on the endpoint (if the buffer interrupt is enabled). It is possible for 2 buffers to be completed, so clearing the buffer status bit may instantly re set it on the next clock cycle.

pub const fn buff_cpu_should_handle(&self) -> &Reg<BUFF_CPU_SHOULD_HANDLE_SPEC>

0x5c - Which of the double buffers should be handled. Only valid if using an interrupt per buffer (i.e. not per 2 buffers). Not valid for host interrupt endpoint polling because they are only single buffered.

pub const fn ep_abort(&self) -> &Reg<EP_ABORT_SPEC>

0x60 - Device only: Can be set to ignore the buffer control register for this endpoint in case you would like to revoke a buffer. A NAK will be sent for every access to the endpoint until this bit is cleared. A corresponding bit in EP_ABORT_DONE is set when it is safe to modify the buffer control register.

pub const fn ep_abort_done(&self) -> &Reg<EP_ABORT_DONE_SPEC>

0x64 - Device only: Used in conjunction with EP_ABORT. Set once an endpoint is idle so the programmer knows it is safe to modify the buffer control register.

pub const fn ep_stall_arm(&self) -> &Reg<EP_STALL_ARM_SPEC>

0x68 - Device: this bit must be set in conjunction with the STALL bit in the buffer control register to send a STALL on EP0. The device controller clears these bits when a SETUP packet is received because the USB spec requires that a STALL condition is cleared when a SETUP packet is received.

pub const fn nak_poll(&self) -> &Reg<NAK_POLL_SPEC>

0x6c - Used by the host controller. Sets the wait time in microseconds before trying again if the device replies with a NAK.

pub const fn ep_status_stall_nak(&self) -> &Reg<EP_STATUS_STALL_NAK_SPEC>

0x70 - Device: bits are set when the IRQ_ON_NAK or IRQ_ON_STALL bits are set. For EP0 this comes from SIE_CTRL. For all other endpoints it comes from the endpoint control register.

pub const fn usb_muxing(&self) -> &Reg<USB_MUXING_SPEC>

0x74 - Where to connect the USB controller. Should be to_phy by default.

pub const fn usb_pwr(&self) -> &Reg<USB_PWR_SPEC>

0x78 - Overrides for the power signals in the event that the VBUS signals are not hooked up to GPIO. Set the value of the override and then the override enable to switch over to the override value.

pub const fn usbphy_direct(&self) -> &Reg<USBPHY_DIRECT_SPEC>

0x7c - This register allows for direct control of the USB phy. Use in conjunction with usbphy_direct_override register to enable each override bit.

pub const fn usbphy_direct_override(&self) -> &Reg<USBPHY_DIRECT_OVERRIDE_SPEC>

0x80 - Override enable for each control in usbphy_direct

pub const fn usbphy_trim(&self) -> &Reg<USBPHY_TRIM_SPEC>

0x84 - Used to adjust trim values of USB phy pull down resistors.

pub const fn linestate_tuning(&self) -> &Reg<LINESTATE_TUNING_SPEC>

0x88 - Used for debug only.

pub const fn intr(&self) -> &Reg<INTR_SPEC>

0x8c - Raw Interrupts

pub const fn inte(&self) -> &Reg<INTE_SPEC>

0x90 - Interrupt Enable

pub const fn intf(&self) -> &Reg<INTF_SPEC>

0x94 - Interrupt Force

pub const fn ints(&self) -> &Reg<INTS_SPEC>

0x98 - Interrupt status after masking & forcing

pub const fn sof_timestamp_raw(&self) -> &Reg<SOF_TIMESTAMP_RAW_SPEC>

0x100 - Device only. Raw value of free-running PHY clock counter @48MHz. Used to calculate time between SOF events.

pub const fn sof_timestamp_last(&self) -> &Reg<SOF_TIMESTAMP_LAST_SPEC>

0x104 - Device only. Value of free-running PHY clock counter @48MHz when last SOF event occurred.

pub const fn sm_state(&self) -> &Reg<SM_STATE_SPEC>

0x108 -

pub const fn ep_tx_error(&self) -> &Reg<EP_TX_ERROR_SPEC>

0x10c - TX error count for each endpoint. Write to each field to reset the counter to 0.

pub const fn ep_rx_error(&self) -> &Reg<EP_RX_ERROR_SPEC>

0x110 - RX error count for each endpoint. Write to each field to reset the counter to 0.

pub const fn dev_sm_watchdog(&self) -> &Reg<DEV_SM_WATCHDOG_SPEC>

0x114 - Watchdog that forces the device state machine to idle and raises an interrupt if the device stays in a state that isn’t idle for the configured limit. The counter is reset on every state transition. Set limit while enable is low and then set the enable.