pub struct SYSCFG { /* private fields */ }Expand description
Register block for various chip control signals
Implementations§
Source§impl SYSCFG
impl SYSCFG
Sourcepub const PTR: *const RegisterBlock = {0x40008000 as *const rp235x_hal::rp235x_pac::syscfg::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x40008000 as *const rp235x_hal::rp235x_pac::syscfg::RegisterBlock}
Pointer to the register block
Sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
Sourcepub unsafe fn steal() -> SYSCFG
pub unsafe fn steal() -> SYSCFG
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn proc_config(&self) -> &Reg<PROC_CONFIG_SPEC>
pub fn proc_config(&self) -> &Reg<PROC_CONFIG_SPEC>
0x00 - Configuration for processors
Sourcepub fn proc_in_sync_bypass(&self) -> &Reg<PROC_IN_SYNC_BYPASS_SPEC>
pub fn proc_in_sync_bypass(&self) -> &Reg<PROC_IN_SYNC_BYPASS_SPEC>
0x04 - For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 0…31.
Sourcepub fn proc_in_sync_bypass_hi(&self) -> &Reg<PROC_IN_SYNC_BYPASS_HI_SPEC>
pub fn proc_in_sync_bypass_hi(&self) -> &Reg<PROC_IN_SYNC_BYPASS_HI_SPEC>
0x08 - For each bit, if 1, bypass the input synchronizer between that GPIO and the GPIO input register in the SIO. The input synchronizers should generally be unbypassed, to avoid injecting metastabilities into processors. If you’re feeling brave, you can bypass to save two cycles of input latency. This register applies to GPIO 32…47. USB GPIO 56..57 QSPI GPIO 58..63
Sourcepub fn dbgforce(&self) -> &Reg<DBGFORCE_SPEC>
pub fn dbgforce(&self) -> &Reg<DBGFORCE_SPEC>
0x0c - Directly control the chip SWD debug port
Sourcepub fn mempowerdown(&self) -> &Reg<MEMPOWERDOWN_SPEC>
pub fn mempowerdown(&self) -> &Reg<MEMPOWERDOWN_SPEC>
0x10 - Control PD pins to memories. Set high to put memories to a low power state. In this state the memories will retain contents but not be accessible Use with caution
Sourcepub fn auxctrl(&self) -> &Reg<AUXCTRL_SPEC>
pub fn auxctrl(&self) -> &Reg<AUXCTRL_SPEC>
0x14 - Auxiliary system control register
Trait Implementations§
Auto Trait Implementations§
impl Freeze for SYSCFG
impl RefUnwindSafe for SYSCFG
impl !Sync for SYSCFG
impl Unpin for SYSCFG
impl UnwindSafe for SYSCFG
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Source§impl<Choices> CoproductSubsetter<CNil, HNil> for Choices
impl<Choices> CoproductSubsetter<CNil, HNil> for Choices
Source§impl<T> IntoEither for T
impl<T> IntoEither for T
Source§fn into_either(self, into_left: bool) -> Either<Self, Self>
fn into_either(self, into_left: bool) -> Either<Self, Self>
self into a Left variant of Either<Self, Self>
if into_left is true.
Converts self into a Right variant of Either<Self, Self>
otherwise. Read moreSource§fn into_either_with<F>(self, into_left: F) -> Either<Self, Self>
fn into_either_with<F>(self, into_left: F) -> Either<Self, Self>
self into a Left variant of Either<Self, Self>
if into_left(&self) returns true.
Converts self into a Right variant of Either<Self, Self>
otherwise. Read more