Struct ClockTreeVisualizer 

pub struct ClockTreeVisualizer {
    pub margin: u32,
    pub node_radius: u32,
    pub wire_width: u32,
    pub sink_color: String,
    pub internal_color: String,
    pub root_color: String,
    pub wire_color: String,
    pub text_color: String,
}

SVG visualizer for DME clock trees.

Color-codes nodes by type (root=red, internal=blue, sinks=green), draws parent-child wires with length labels, and overlays delay/capacitance info. Optionally displays a skew analysis panel.

Fields

margin: u32

node_radius: u32

wire_width: u32

sink_color: String

internal_color: String

root_color: String

wire_color: String

text_color: String

Implementations

impl ClockTreeVisualizer

pub fn new() -> Self

pub fn visualize_tree( &self, tree: &Tree, root: NodeIdx, sinks: &[Sink], filename: &str, width: u32, height: u32, analysis: Option<&SkewAnalysis>, ) -> String

Produce an SVG string visualizing the clock tree rooted at root.

• tree — the arena-allocated clock tree (from DMEAlgorithm::get_tree())
• root — root node index (returned by DMEAlgorithm::build_clock_tree)
• sinks — original sink list (used to identify leaf nodes)
• filename — if non-empty, save the SVG to this path
• width, height — SVG canvas dimensions
• analysis — optional SkewAnalysis to display in an info panel

Trait Implementations

impl Default for ClockTreeVisualizer

fn default() -> Self

Returns the “default value” for a type.