Enum CacheConfig 

#[repr(u32)]
pub enum CacheConfig {
    PreferNone = 0,
    PreferShared = 1,
    PreferL1 = 2,
    PreferEqual = 3,
}

Preferred cache configuration for a CUDA context or function.

Controls the trade-off between L1 cache and shared memory on devices that share the same on-chip memory for both.

Variants

PreferNone = 0

No preference — the driver picks.

PreferShared = 1

Prefer more shared memory over L1 cache.

PreferL1 = 2

Prefer more L1 cache over shared memory.

PreferEqual = 3

Equal split between L1 and shared memory.

Trait Implementations

impl Clone for CacheConfig

fn clone(&self) -> CacheConfig

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for CacheConfig

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Hash for CacheConfig

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl PartialEq for CacheConfig

fn eq(&self, other: &CacheConfig) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for CacheConfig

impl Eq for CacheConfig

impl StructuralPartialEq for CacheConfig