pub struct SimdCapabilityInfo {
pub has_sse42: bool,
pub has_avx: bool,
pub has_avx2: bool,
pub has_fma: bool,
pub has_avx512f: bool,
pub has_avx512bw: bool,
pub has_avx512vl: bool,
pub has_neon: bool,
pub has_sve: bool,
pub cache_line_bytes: usize,
pub vector_width_bytes: usize,
}Expand description
Extended CPU SIMD capability description with the field naming convention required by the multi-versioning layer.
On std-enabled builds, SimdCapabilityInfo::detect returns a
&'static Self reference that is initialised exactly once per process
(via OnceLock). On no_std builds it returns a fresh Self value
computed from compile-time cfg! constants.
Fields§
§has_sse42: boolSSE4.2 support (x86-64 only).
has_avx: boolAVX support (x86-64 only).
has_avx2: boolAVX2 support (x86-64 only).
has_fma: boolFMA (Fused Multiply-Add) support (x86-64 only).
has_avx512f: boolAVX-512 Foundation support (x86-64 only).
has_avx512bw: boolAVX-512 Byte & Word instructions (x86-64 only).
has_avx512vl: boolAVX-512 Vector Length extensions (x86-64 only).
has_neon: boolNEON support. Always true on AArch64.
has_sve: boolSVE (Scalable Vector Extension) support.
cache_line_bytes: usizeBytes in a single cache line (typically 64 on modern CPUs).
vector_width_bytes: usizeWidth of the widest supported SIMD vector register in bytes.
Implementations§
Source§impl SimdCapabilityInfo
impl SimdCapabilityInfo
Sourcepub fn detect() -> &'static Self
pub fn detect() -> &'static Self
Detect (or derive) capabilities for the current CPU and return a reference to the process-wide cached value.
The first call performs runtime detection and stores the result.
Subsequent calls return the same &'static reference.
Sourcepub fn has_avx512_full(&self) -> bool
pub fn has_avx512_full(&self) -> bool
Returns true when AVX-512F, BW, and VL are all present.
Sourcepub fn has_avx2_fma(&self) -> bool
pub fn has_avx2_fma(&self) -> bool
Returns true when both AVX2 and FMA are present.
Sourcepub fn f64_simd_width(&self) -> usize
pub fn f64_simd_width(&self) -> usize
Number of f64 elements that fit in the widest supported SIMD register.
For AVX-512 this is 8; for AVX2 / NEON-128 this is 4 / 2; for scalar 1.
Sourcepub fn f32_simd_width(&self) -> usize
pub fn f32_simd_width(&self) -> usize
Number of f32 elements that fit in the widest supported SIMD register.
Always twice f64_simd_width().
Sourcepub fn optimal_level(&self) -> LegacyLevel
pub fn optimal_level(&self) -> LegacyLevel
Returns the LegacyLevel that best summarises these capabilities.
Trait Implementations§
Source§impl Clone for SimdCapabilityInfo
impl Clone for SimdCapabilityInfo
Source§fn clone(&self) -> SimdCapabilityInfo
fn clone(&self) -> SimdCapabilityInfo
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more