pub struct Ast {Show 14 fields
pub branches: IndexVec<BranchId, AttributeNode<BranchDeclaration>>,
pub nets: IndexVec<NetId, AttributeNode<Net>>,
pub ports: IndexVec<PortId, AttributeNode<Port>>,
pub variables: IndexVec<VariableId, AttributeNode<Variable>>,
pub parameters: IndexVec<ParameterId, AttributeNode<Parameter>>,
pub modules: IndexVec<ModuleId, AttributeNode<Module>>,
pub functions: IndexVec<FunctionId, AttributeNode<Function>>,
pub disciplines: IndexVec<DisciplineId, AttributeNode<Discipline>>,
pub natures: IndexVec<NatureId, AttributeNode<Nature>>,
pub expressions: IndexVec<ExpressionId, Node<Expression>>,
pub blocks: IndexVec<BlockId, AttributeNode<SeqBlock>>,
pub attributes: IndexVec<AttributeId, Attribute>,
pub statements: IndexVec<StatementId, Statement>,
pub top_symbols: SymbolTable,
}Expand description
An Ast representing a parsed Verilog-AMS project (root file); It provides stable indicies for every Node because the entire Tree is immutable once created; It uses preallocated constant size arrays for performance
Fields§
§branches: IndexVec<BranchId, AttributeNode<BranchDeclaration>>§nets: IndexVec<NetId, AttributeNode<Net>>§ports: IndexVec<PortId, AttributeNode<Port>>§variables: IndexVec<VariableId, AttributeNode<Variable>>§parameters: IndexVec<ParameterId, AttributeNode<Parameter>>§modules: IndexVec<ModuleId, AttributeNode<Module>>§functions: IndexVec<FunctionId, AttributeNode<Function>>§disciplines: IndexVec<DisciplineId, AttributeNode<Discipline>>§natures: IndexVec<NatureId, AttributeNode<Nature>>§expressions: IndexVec<ExpressionId, Node<Expression>>§blocks: IndexVec<BlockId, AttributeNode<SeqBlock>>§attributes: IndexVec<AttributeId, Attribute>§statements: IndexVec<StatementId, Statement>§top_symbols: SymbolTableImplementations§
Source§impl Ast
impl Ast
Sourcepub fn lower(self) -> Result<Hir, (Vec<Error>, Self)>
pub fn lower(self) -> Result<Hir, (Vec<Error>, Self)>
Lowers an AST to an HIR by resolving references, ambiguities and enforcing nature/discipline comparability
Sourcepub fn lower_with_decl_handler(
self,
declaration_handler: &mut impl DeclarationHandler,
) -> Result<Hir, (Vec<Error>, Self)>
pub fn lower_with_decl_handler( self, declaration_handler: &mut impl DeclarationHandler, ) -> Result<Hir, (Vec<Error>, Self)>
Lowers an AST to an HIR by resolving references, ambiguities and enforcing nature/discipline comparability
Sourcepub fn lower_and_print_errors(
self,
source_map: &SourceMap<'_>,
translate_lines: bool,
) -> Option<Hir>
pub fn lower_and_print_errors( self, source_map: &SourceMap<'_>, translate_lines: bool, ) -> Option<Hir>
Lowers an AST to an HIR by resolving references, ambiguities and enforcing nature/discipline comparability and printing any errors or warnings that might occur
Sourcepub fn lower_and_print_errors_with_var_decl_handle(
self,
source_map: &SourceMap<'_>,
translate_lines: bool,
declaration_handler: &mut impl DeclarationHandler,
) -> Option<Hir>
pub fn lower_and_print_errors_with_var_decl_handle( self, source_map: &SourceMap<'_>, translate_lines: bool, declaration_handler: &mut impl DeclarationHandler, ) -> Option<Hir>
Lowers an AST to an HIR by resolving references, ambiguities and enforcing nature/discipline comparability and printing any errors or warnings that might occur
Source§impl Ast
impl Ast
Sourcepub fn parse_from<'source_map, 'lt>(
&'lt mut self,
main_file: &Path,
source_map_allocator: &'source_map Bump,
) -> Result<(&'source_map SourceMap<'source_map>, Vec<Error>, Vec<Warning>)>
pub fn parse_from<'source_map, 'lt>( &'lt mut self, main_file: &Path, source_map_allocator: &'source_map Bump, ) -> Result<(&'source_map SourceMap<'source_map>, Vec<Error>, Vec<Warning>)>
The main point of this module. Parses a verilog-ams source file into an ast and returns any errors that occur
§Arguments
-
main_file- The Verilog-A source file to parse -
source_map_allocator- A bump allocator that will be used to allocate the source map. (Bump::new()can be used to create one)
§Returns
- An Io Error if the
main_filecould not be read - A
SourceMapof the parsed file generated during parsing - A list of all Errors that occurred during parsing
- A list of all Warnings generated during parsing
Sourcepub fn parse_from_and_print_errors<'source_map, 'lt>(
&'lt mut self,
main_file: &Path,
source_map_allocator: &'source_map Bump,
translate_lines: bool,
) -> Option<&'source_map SourceMap<'source_map>>
pub fn parse_from_and_print_errors<'source_map, 'lt>( &'lt mut self, main_file: &Path, source_map_allocator: &'source_map Bump, translate_lines: bool, ) -> Option<&'source_map SourceMap<'source_map>>
Parses a verilog-ams source file into an ast and prints any errors that occur
§Arguments
-
main_file- The Verilog-A source file to parse -
source_map_allocator- A bump allocator that will be used to allocate the source map. (Bump::new()can be used to create one) -
translate_lines- When this is set to true the line numbers of printed errors are translated to reflect the line in the original source file instead of the source that was expanded by the preprocessor
§Returns
- Parse successful - A Source Map of the parsed source
- Errors occurred during - Prints the errors and returns
None