Enum Aarch64Reloc 

#[non_exhaustive]
pub enum Aarch64Reloc {
    Abs64,
    Abs32,
    Prel64,
    Prel32,
    Call26,
    Jump26,
    CondBr19,
    TstBr14,
    AdrPrelLo21,
    AdrPrelPgHi21,
    AddAbsLo12Nc,
    Ldst8AbsLo12Nc,
    Ldst16AbsLo12Nc,
    Ldst32AbsLo12Nc,
    Ldst64AbsLo12Nc,
    Ldst128AbsLo12Nc,
    AdrGotPage,
    Ld64GotLo12Nc,
}

An AArch64 relocation. Each variant names its ELF counterpart; in the formulas, S is the target’s address, A the addend, P the address of the patched bytes, Page(x) is x with its low 12 bits cleared, and G the address of the target’s GOT entry. Instruction relocations patch an immediate field of a 4-byte instruction, so their offset must be a multiple of 4.

Examples

use object_lang::{Aarch64Reloc, RelocationKind};

assert!(RelocationKind::from(Aarch64Reloc::Call26).is_instruction());
assert!(!RelocationKind::from(Aarch64Reloc::Abs64).is_instruction());

Variants (Non-exhaustive)

Non-exhaustive enums could have additional variants added in future. Therefore, when matching against variants of non-exhaustive enums, an extra wildcard arm must be added to account for any future variants.

Abs64

S + A, 64 bits of data (R_AARCH64_ABS64).

Abs32

S + A, 32 bits of data (R_AARCH64_ABS32).

Prel64

S + A - P, 64 bits of data (R_AARCH64_PREL64).

Prel32

S + A - P, 32 bits of data (R_AARCH64_PREL32).

Call26

S + A - P into a BL (R_AARCH64_CALL26): ±128 MiB.

Jump26

S + A - P into a B (R_AARCH64_JUMP26): ±128 MiB.

CondBr19

S + A - P into a B.cond, CBZ, or CBNZ (R_AARCH64_CONDBR19): ±1 MiB.

TstBr14

S + A - P into a TBZ or TBNZ (R_AARCH64_TSTBR14): ±32 KiB.

AdrPrelLo21

S + A - P into an ADR (R_AARCH64_ADR_PREL_LO21): ±1 MiB.

AdrPrelPgHi21

Page(S + A) - Page(P) into an ADRP (R_AARCH64_ADR_PREL_PG_HI21): ±4 GiB.

AddAbsLo12Nc

Low 12 bits of S + A into an ADD immediate (R_AARCH64_ADD_ABS_LO12_NC).

Ldst8AbsLo12Nc

Low 12 bits of S + A into an 8-bit LDR/STR offset (R_AARCH64_LDST8_ABS_LO12_NC).

Ldst16AbsLo12Nc

Bits 11:1 of S + A into a 16-bit LDR/STR offset (R_AARCH64_LDST16_ABS_LO12_NC).

Ldst32AbsLo12Nc

Bits 11:2 of S + A into a 32-bit LDR/STR offset (R_AARCH64_LDST32_ABS_LO12_NC).

Ldst64AbsLo12Nc

Bits 11:3 of S + A into a 64-bit LDR/STR offset (R_AARCH64_LDST64_ABS_LO12_NC).

Ldst128AbsLo12Nc

Bits 11:4 of S + A into a 128-bit LDR/STR offset (R_AARCH64_LDST128_ABS_LO12_NC).

AdrGotPage

Page(G) - Page(P) into an ADRP (R_AARCH64_ADR_GOT_PAGE).

Ld64GotLo12Nc

Bits 11:3 of G into an LDR (R_AARCH64_LD64_GOT_LO12_NC).

Trait Implementations

impl Clone for Aarch64Reloc

fn clone(&self) -> Self

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Aarch64Reloc

impl Debug for Aarch64Reloc

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Eq for Aarch64Reloc

impl From<Aarch64Reloc> for RelocationKind

fn from(kind: Aarch64Reloc) -> Self

Converts to this type from the input type.

impl Hash for Aarch64Reloc

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given Hasher.

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given Hasher.

impl PartialEq for Aarch64Reloc

fn eq(&self, other: &Self) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for Aarch64Reloc