Expand description
Peripheral access API for NRF9160 microcontrollers (generated using svd2rust v0.14.0)
You can find an overview of the API here.
Modules§
- clock_
ns - Clock management 0
- cryptocell_
s - ARM TrustZone CryptoCell register interface
- ctrl_
ap_ peri_ s - Control access port
- dppic_
ns - Distributed Programmable Peripheral Interconnect Controller 0
- egu0_ns
- Event Generator Unit 0
- ficr_s
- Factory Information Configuration Registers
- fpu_ns
- FPU 0
- gpiote0_
s - GPIO Tasks and Events 0
- i2s_ns
- Inter-IC Sound 0
- ipc_ns
- Inter Processor Communication 0
- kmu_ns
- Key management unit 0
- nvmc_ns
- Non-volatile memory controller 0
- p0_ns
- GPIO Port 0
- pdm_ns
- Pulse Density Modulation (Digital Microphone) Interface 0
- power_
ns - Power control 0
- pwm0_ns
- Pulse width modulation unit 0
- regulators_
ns - Voltage regulators control 0
- rtc0_ns
- Real-time counter 0
- saadc_
ns - Analog to Digital Converter 0
- spim0_
ns - Serial Peripheral Interface Master with EasyDMA 0
- spis0_
ns - SPI Slave 0
- spu_s
- System protection unit
- tad_s
- Trace and debug control
- timer0_
ns - Timer/Counter 0
- twim0_
ns - I2C compatible Two-Wire Master Interface with EasyDMA 0
- twis0_
ns - I2C compatible Two-Wire Slave Interface with EasyDMA 0
- uarte0_
ns - UART with EasyDMA 0
- uicr_s
- User information configuration registers User information configuration registers
- vmc_ns
- Volatile Memory controller 0
- wdt_ns
- Watchdog Timer 0
Structs§
- CBP
- Cache and branch predictor maintenance operations
- CLOCK_
NS - Clock management 0
- CLOCK_S
- Clock management 1
- CPUID
- CPUID
- CRYPTOCELL_
S - ARM TrustZone CryptoCell register interface
- CTRL_
AP_ PERI_ S - Control access port
- Core
Peripherals - Core peripherals
- DCB
- Debug Control Block
- DPPIC_
NS - Distributed Programmable Peripheral Interconnect Controller 0
- DPPIC_S
- Distributed Programmable Peripheral Interconnect Controller 1
- DWT
- Data Watchpoint and Trace unit
- EGU0_NS
- Event Generator Unit 0
- EGU0_S
- Event Generator Unit 1
- EGU1_NS
- Event Generator Unit 2
- EGU1_S
- Event Generator Unit 3
- EGU2_NS
- Event Generator Unit 4
- EGU2_S
- Event Generator Unit 5
- EGU3_NS
- Event Generator Unit 6
- EGU3_S
- Event Generator Unit 7
- EGU4_NS
- Event Generator Unit 8
- EGU4_S
- Event Generator Unit 9
- EGU5_NS
- Event Generator Unit 10
- EGU5_S
- Event Generator Unit 11
- FICR_S
- Factory Information Configuration Registers
- FPB
- Flash Patch and Breakpoint unit
- FPU
- Floating Point Unit
- FPU_NS
- FPU 0
- FPU_S
- FPU 1
- GPIOT
E0_ S - GPIO Tasks and Events 0
- GPIOT
E1_ NS - GPIO Tasks and Events 1
- I2S_NS
- Inter-IC Sound 0
- I2S_S
- Inter-IC Sound 1
- IPC_NS
- Inter Processor Communication 0
- IPC_S
- Inter Processor Communication 1
- ITM
- Instrumentation Trace Macrocell
- KMU_NS
- Key management unit 0
- KMU_S
- Key management unit 1
- MPU
- Memory Protection Unit
- NVIC
- Nested Vector Interrupt Controller
- NVMC_NS
- Non-volatile memory controller 0
- NVMC_S
- Non-volatile memory controller 1
- P0_NS
- GPIO Port 0
- P0_S
- GPIO Port 1
- PDM_NS
- Pulse Density Modulation (Digital Microphone) Interface 0
- PDM_S
- Pulse Density Modulation (Digital Microphone) Interface 1
- POWER_
NS - Power control 0
- POWER_S
- Power control 1
- PWM0_NS
- Pulse width modulation unit 0
- PWM0_S
- Pulse width modulation unit 1
- PWM1_NS
- Pulse width modulation unit 2
- PWM1_S
- Pulse width modulation unit 3
- PWM2_NS
- Pulse width modulation unit 4
- PWM2_S
- Pulse width modulation unit 5
- PWM3_NS
- Pulse width modulation unit 6
- PWM3_S
- Pulse width modulation unit 7
- Peripherals
- All the peripherals
- REGULATORS_
NS - Voltage regulators control 0
- REGULATORS_
S - Voltage regulators control 1
- RTC0_NS
- Real-time counter 0
- RTC0_S
- Real-time counter 1
- RTC1_NS
- Real-time counter 2
- RTC1_S
- Real-time counter 3
- SAADC_
NS - Analog to Digital Converter 0
- SAADC_S
- Analog to Digital Converter 1
- SCB
- System Control Block
- SPIM0_
NS - Serial Peripheral Interface Master with EasyDMA 0
- SPIM0_S
- Serial Peripheral Interface Master with EasyDMA 1
- SPIM1_
NS - Serial Peripheral Interface Master with EasyDMA 2
- SPIM1_S
- Serial Peripheral Interface Master with EasyDMA 3
- SPIM2_
NS - Serial Peripheral Interface Master with EasyDMA 4
- SPIM2_S
- Serial Peripheral Interface Master with EasyDMA 5
- SPIM3_
NS - Serial Peripheral Interface Master with EasyDMA 6
- SPIM3_S
- Serial Peripheral Interface Master with EasyDMA 7
- SPIS0_
NS - SPI Slave 0
- SPIS0_S
- SPI Slave 1
- SPIS1_
NS - SPI Slave 2
- SPIS1_S
- SPI Slave 3
- SPIS2_
NS - SPI Slave 4
- SPIS2_S
- SPI Slave 5
- SPIS3_
NS - SPI Slave 6
- SPIS3_S
- SPI Slave 7
- SPU_S
- System protection unit
- SYST
- SysTick: System Timer
- TAD_S
- Trace and debug control
- TIME
R0_ NS - Timer/Counter 0
- TIME
R0_ S - Timer/Counter 1
- TIME
R1_ NS - Timer/Counter 2
- TIME
R1_ S - Timer/Counter 3
- TIME
R2_ NS - Timer/Counter 4
- TIME
R2_ S - Timer/Counter 5
- TPIU
- Trace Port Interface Unit
- TWIM0_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 0
- TWIM0_S
- I2C compatible Two-Wire Master Interface with EasyDMA 1
- TWIM1_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 2
- TWIM1_S
- I2C compatible Two-Wire Master Interface with EasyDMA 3
- TWIM2_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 4
- TWIM2_S
- I2C compatible Two-Wire Master Interface with EasyDMA 5
- TWIM3_
NS - I2C compatible Two-Wire Master Interface with EasyDMA 6
- TWIM3_S
- I2C compatible Two-Wire Master Interface with EasyDMA 7
- TWIS0_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 0
- TWIS0_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 1
- TWIS1_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 2
- TWIS1_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 3
- TWIS2_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 4
- TWIS2_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 5
- TWIS3_
NS - I2C compatible Two-Wire Slave Interface with EasyDMA 6
- TWIS3_S
- I2C compatible Two-Wire Slave Interface with EasyDMA 7
- UART
E0_ NS - UART with EasyDMA 0
- UART
E0_ S - UART with EasyDMA 1
- UART
E1_ NS - UART with EasyDMA 2
- UART
E1_ S - UART with EasyDMA 3
- UART
E2_ NS - UART with EasyDMA 4
- UART
E2_ S - UART with EasyDMA 5
- UART
E3_ NS - UART with EasyDMA 6
- UART
E3_ S - UART with EasyDMA 7
- UICR_S
- User information configuration registers User information configuration registers
- VMC_NS
- Volatile Memory controller 0
- VMC_S
- Volatile Memory controller 1
- WDT_NS
- Watchdog Timer 0
- WDT_S
- Watchdog Timer 1
Enums§
- Interrupt
- Enumeration of all the interrupts
Constants§
- NVIC_
PRIO_ BITS - Number available in the NVIC for configuring priority