Expand description

Peripheral access API for NRF52 microcontrollers (generated using svd2rust v0.21.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports

pub use spim0 as spim1;
pub use spis0 as spis1;
pub use twim0 as twim1;
pub use twis0 as twis1;
pub use spi0 as spi1;
pub use twi0 as twi1;
pub use timer0 as timer1;
pub use timer0 as timer2;
pub use rtc0 as rtc1;
pub use swi0 as swi1;
pub use egu0 as egu1;
pub use swi0 as swi2;
pub use egu0 as egu2;
pub use swi0 as swi3;
pub use egu0 as egu3;
pub use swi0 as swi4;
pub use egu0 as egu4;
pub use swi0 as swi5;
pub use egu0 as egu5;
pub use timer3 as timer4;
pub use pwm0 as pwm1;
pub use pwm0 as pwm2;
pub use spim0 as spim2;
pub use spis0 as spis2;
pub use spi0 as spi2;
pub use rtc0 as rtc2;

Modules

Accelerated Address Resolver

Block Protect

AES CCM Mode Encryption

Clock control

Comparator

AES ECB Mode Encryption

Event Generator Unit 0

Factory Information Configuration Registers

Common register and bit access and modify traits

GPIO Tasks and Events

Inter-IC Sound

Low Power Comparator

Memory Watch Unit

NFC-A compatible radio

Non Volatile Memory Controller

GPIO Port 1

Pulse Density Modulation (Digital Microphone) Interface

Power control

Programmable Peripheral Interconnect

Pulse Width Modulation Unit 0

Quadrature Decoder

2.4 GHz Radio

Random Number Generator

Real time counter 0

Analog to Digital Converter

Serial Peripheral Interface 0

Serial Peripheral Interface Master with EasyDMA 0

SPI Slave 0

Software interrupt 0

Temperature Sensor

Timer/Counter 0

Timer/Counter 3

I2C compatible Two-Wire Interface 0

I2C compatible Two-Wire Master Interface with EasyDMA 0

I2C compatible Two-Wire Slave Interface with EasyDMA 0

Universal Asynchronous Receiver/Transmitter

UART with EasyDMA

User Information Configuration Registers

Watchdog Timer

Structs

Accelerated Address Resolver

Block Protect

Cache and branch predictor maintenance operations

AES CCM Mode Encryption

Clock control

Comparator

CPUID

Core peripherals

Debug Control Block

Data Watchpoint and Trace unit

AES ECB Mode Encryption

Event Generator Unit 0

Event Generator Unit 1

Event Generator Unit 2

Event Generator Unit 3

Event Generator Unit 4

Event Generator Unit 5

Factory Information Configuration Registers

Flash Patch and Breakpoint unit

Floating Point Unit

GPIO Tasks and Events

Inter-IC Sound

Instrumentation Trace Macrocell

Low Power Comparator

Memory Protection Unit

Memory Watch Unit

NFC-A compatible radio

Nested Vector Interrupt Controller

Non Volatile Memory Controller

GPIO Port 1

Pulse Density Modulation (Digital Microphone) Interface

Power control

Programmable Peripheral Interconnect

Pulse Width Modulation Unit 0

Pulse Width Modulation Unit 1

Pulse Width Modulation Unit 2

All the peripherals

Quadrature Decoder

2.4 GHz Radio

Random Number Generator

Real time counter 0

Real time counter 1

Real time counter 2

Analog to Digital Converter

System Control Block

Serial Peripheral Interface 0

Serial Peripheral Interface 1

Serial Peripheral Interface 2

Serial Peripheral Interface Master with EasyDMA 0

Serial Peripheral Interface Master with EasyDMA 1

Serial Peripheral Interface Master with EasyDMA 2

SPI Slave 0

SPI Slave 1

SPI Slave 2

Software interrupt 0

Software interrupt 1

Software interrupt 2

Software interrupt 3

Software interrupt 4

Software interrupt 5

SysTick: System Timer

Temperature Sensor

Timer/Counter 0

Timer/Counter 1

Timer/Counter 2

Timer/Counter 3

Timer/Counter 4

Trace Port Interface Unit

I2C compatible Two-Wire Interface 0

I2C compatible Two-Wire Interface 1

I2C compatible Two-Wire Master Interface with EasyDMA 0

I2C compatible Two-Wire Master Interface with EasyDMA 1

I2C compatible Two-Wire Slave Interface with EasyDMA 0

I2C compatible Two-Wire Slave Interface with EasyDMA 1

Universal Asynchronous Receiver/Transmitter

UART with EasyDMA

User Information Configuration Registers

Watchdog Timer

Enums

Enumeration of all the interrupts.

Constants

Number available in the NVIC for configuring priority